Abstract: A method and system are provided for supplying power to a backup power domain by connecting a battery voltage to a supply terminal for a backup power domain in a low power microcontroller during a startup mode when a main supply voltage, by detecting application of the main supply voltage to the low power microcontroller at a predetermined safe voltage level, and by activating a selection control circuit to power the backup power domain in the low power microcontroller from the main power supply voltage or the backup power supply voltage based on a software-controlled configuration bit, where the selection control circuit is configured to connect, in response to the software-controlled configuration bit having a first user-selected value, the main power supply voltage to the supply terminal for the backup power domain when the main power supply voltage is smaller than the battery power supply voltage.

Abstract: A regulator includes an error amplifier with a first input coupled to receive a reference voltage and a second input coupled to receive a feedback signal. A driver transistor provides an output voltage of the regulator that powers a memory. A replica transistor provides a replica voltage that powers a replica of the memory. A first ratio of a size of the replica of the memory to a size of the memory is less than one, and a second ratio of a drive strength of the replica transistor to a drive strength of the driver transistor is less than one. Each of the first ratio and the second ratio is at most 1/500. Switching circuitry provides one of the output voltage or the replica voltage as the feedback signal to the error amplifier.

Abstract: A regulator includes an error amplifier with a first input coupled to receive a reference voltage and a second input coupled to receive a feedback signal. A driver transistor provides an output voltage of the regulator that powers a memory. A replica transistor provides a replica voltage that powers a replica of the memory. A first ratio of a size of the replica of the memory to a size of the memory is less than one, and a second ratio of a drive strength of the replica transistor to a drive strength of the driver transistor is less than one. Each of the first ratio and the second ratio is at most 1/500. Switching circuitry provides one of the output voltage or the replica voltage as the feedback signal to the error amplifier.

Abstract: A first voltage scaling power switch is coupled to a first power supply terminal for providing power to a first circuit portion, and a second voltage scaling power switch is coupled between the first power supply terminal providing power to a second circuit portion. A common power rail is coupled the first and second power input nodes during respective voltage scaling modes of the first and second circuit portions. A feedback circuit coupled to the common power rail provides a feedback signal to a control input of the first voltage scaling power switch to regulate a voltage provided by the first power switch, and to a control input of the second voltage scaling power switch to regulate a voltage provided by the second voltage scaling power switch.

Abstract: A method and apparatus for limiting access to an integrated circuit (IC) upon detection of abnormal conditions is provided. At least one of abnormal voltage detection, abnormal temperature detection, and abnormal clock detection are provided with low power consumption. Both abnormally low and abnormally high parameter values (e.g. abnormally low or high voltage, temperature, or clock frequency) may be detected. Abnormal clock detection may also detect a stopped clock signal, including a clock signal stopped at a low logic level or at a high logic level. Furthermore, abnormal clock detection may detect an abnormal duty cycle of a clock signal. A sampled bandgap reference may be used to provide accurate voltage and current references while consuming a minimal amount of power. Upon detection of an abnormal parameter value, one or more tamper indications may be provided to initiate tampering countermeasures, such as limiting access to the IC.

Abstract: A voltage regulation system includes a voltage regulator configured to output a control signal indicating whether a voltage based on output of the voltage regulator is lower than a specified value. A charge pump is configured to output a voltage and a charging current. A pump monitor is configured to receive the control signal and the output voltage of the charge pump, and activate the charge pump when the control signal indicates the voltage based on output of the voltage regulator is lower than a specified value and the output voltage of the charge pump is lower than a threshold value.

Abstract: A method and apparatus for limiting access to an integrated circuit (IC) upon detection of abnormal conditions is provided. At least one of abnormal voltage detection, abnormal temperature detection, and abnormal clock detection are provided with low power consumption. Both abnormally low and abnormally high parameter values (e.g. abnormally low or high voltage, temperature, or clock frequency) may be detected. Abnormal clock detection may also detect a stopped clock signal, including a clock signal stopped at a low logic level or at a high logic level. Furthermore, abnormal clock detection may detect an abnormal duty cycle of a clock signal. A sampled bandgap reference may be used to provide accurate voltage and current references while consuming a minimal amount of power. Upon detection of an abnormal parameter value, one or more tamper indications may be provided to initiate tampering countermeasures, such as limiting access to the IC.

Abstract: A voltage regulation system includes a voltage regulator configured to output a control signal indicating whether a voltage based on output of the voltage regulator is lower than a specified value. A charge pump is configured to output a voltage and a charging current. A pump monitor is configured to receive the control signal and the output voltage of the charge pump, and activate the charge pump when the control signal indicates the voltage based on output of the voltage regulator is lower than a specified value and the output voltage of the charge pump is lower than a threshold value.

Abstract: A method and apparatus for limiting access to an integrated circuit (IC) upon detection of abnormal conditions is provided. At least one of abnormal voltage detection, abnormal temperature detection, and abnormal clock detection are provided with low power consumption. Both abnormally low and abnormally high parameter values (e.g. abnormally low or high voltage, temperature, or clock frequency) may be detected. Abnormal clock detection may also detect a stopped clock signal, including a clock signal stopped at a low logic level or at a high logic level. Furthermore, abnormal clock detection may detect an abnormal duty cycle of a clock signal. A sampled bandgap reference may be used to provide accurate voltage and current references while consuming a minimal amount of power. Upon detection of an abnormal parameter value, one or more tamper indications may be provided to initiate tampering countermeasures, such as limiting access to the IC.

Abstract: A timer to provide pulses at a comparator output wherein a frequency of the pulses is dependent on temperature, wherein providing each pulse includes biasing a first input of the comparator at a voltage and operating a transistor in a subthreshold region of operation to change the voltage of the first input of a comparator at a rate dependent upon temperature. The output of the comparator changes state when the voltage of the first input crosses a voltage of a second input of the comparator.

Abstract: An IC provides tracking between multiple regulated voltages. The IC includes, a voltage reference circuit, a voltage multiplier circuit, and first and second voltage regulator circuits. The voltage reference circuit generates a first reference voltage. The first voltage regulator circuit generates, at a first terminal of a first output transistor, a first regulated voltage that is based on the first reference voltage. The voltage multiplier circuit generates a second reference voltage from an equivalent of the first reference voltage. The second voltage regulator circuit generates, at a first terminal of a second output transistor, a second regulated voltage that is based on the second reference voltage. At least one terminal of the second output transistor is capacitively coupled to the first terminal of the first output transistor.

Abstract: An IC provides tracking between multiple regulated voltages. The IC includes, a voltage reference circuit, a voltage multiplier circuit, and first and second voltage regulator circuits. The voltage reference circuit generates a first reference voltage. The first voltage regulator circuit generates, at a first terminal of a first output transistor, a first regulated voltage that is based on the first reference voltage. The voltage multiplier circuit generates a second reference voltage from an equivalent of the first reference voltage. The second voltage regulator circuit generates, at a first terminal of a second output transistor, a second regulated voltage that is based on the second reference voltage. At least one terminal of the second output transistor is capacitively coupled to the first terminal of the first output transistor.

Abstract: A timer to provide pulses at a comparator output wherein a frequency of the pulses is dependent on temperature, wherein providing each pulse includes biasing a first input of the comparator at a voltage and operating a transistor in a subthreshold region of operation to change the voltage of the first input of a comparator at a rate dependent upon temperature. The output of the comparator changes state when the voltage of the first input crosses a voltage of a second input of the comparator.

Abstract: A method and apparatus for limiting access to an integrated circuit (IC) upon detection of abnormal conditions is provided. At least one of abnormal voltage detection, abnormal temperature detection, and abnormal clock detection are provided with low power consumption. Both abnormally low and abnormally high parameter values (e.g. abnormally low or high voltage, temperature, or clock frequency) may be detected. Abnormal clock detection may also detect a stopped clock signal, including a clock signal stopped at a low logic level or at a high logic level. Furthermore, abnormal clock detection may detect an abnormal duty cycle of a clock signal. A sampled bandgap reference may be used to provide accurate voltage and current references while consuming a minimal amount of power. Upon detection of an abnormal parameter value, one or more tamper indications may be provided to initiate tampering countermeasures, such as limiting access to the IC.

Abstract: An integrated circuit includes first and second transistors, a switch, and a power-on reset (POR) circuit. The first transistor has a first current electrode, a second current electrode, and a control electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a second current electrode, and a control electrode. The switch is for coupling the first and second transistors to receive a power supply voltage in response to an asserted bias control signal. The POR circuit has a latch-up detection circuit coupled to receive the power supply voltage and to a control terminal of the switch. The latch-up detection circuit is for detecting a low voltage condition of the power supply voltage, and in response, deasserting the bias control signal to decouple the first and second transistors from the power supply voltage.

Abstract: A device includes a comparator, and a selection circuit coupled to the inputs of the comparator. The selection circuit receives reference voltages and a variable voltage. In a normal operation mode, the selection circuit provides the variable voltage and a selected reference voltage to the comparator and the comparator provides an indication based on the variable voltage. In a test mode, the selection circuit provides a first selected reference voltage and a second selected reference voltage to the comparator for determining a switching offset voltage of the comparator.

Abstract: An integrated circuit includes first and second transistors, a switch, and a power-on reset (POR) circuit. The first transistor has a first current electrode, a second current electrode, and a control electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a second current electrode, and a control electrode. The switch is for coupling the first and second transistors to receive a power supply voltage in response to an asserted bias control signal. The POR circuit has a latch-up detection circuit coupled to receive the power supply voltage and to a control terminal of the switch. The latch-up detection circuit is for detecting a low voltage condition of the power supply voltage, and in response, deasserting the bias control signal to decouple the first and second transistors from the power supply voltage.

Abstract: A device includes a comparator, and a selection circuit coupled to the inputs of the comparator. The selection circuit receives reference voltages and a variable voltage. In a normal operation mode, the selection circuit provides the variable voltage and a selected reference voltage to the comparator and the comparator provides an indication based on the variable voltage. In a test mode, the selection circuit provides a first selected reference voltage and a second selected reference voltage to the comparator for determining a switching offset voltage of the comparator.