Abstract: A shuffle exchange network includes a first circuit that includes a first stage having a first set of elements storing a first set of sequences of length N, and multiple exchange units each receiving input from a first pair of the elements. Each exchange unit selectively couples the first pair of elements in the first stage to a second pair of elements that is fed back to the first stage. The exchange units receive input from each pair of elements based on a perfect shuffle operation. A second circuit outputs to the first circuit and includes a second stage preceding the first stage. The second circuit operates based on an inverse perfect shuffle operation.

Abstract: A processor-implemented method for executing a hardware intrinsic programming instruction, includes performing one or more Boolean operations in combination with one or more permutation operations in response to the hardware intrinsic programming instruction being a single predicated compare-exchange-shuffle programming instruction. The method also includes outputting a sub-sorted list after the performing of the one or more Boolean operation in combination with the one or more permutation operation.

Abstract: A processor-implemented method for executing a hardware intrinsic programming instruction, includes performing one or more Boolean operations in combination with one or more permutation operations in response to the hardware intrinsic programming instruction being a single predicated compare-exchange-shuffle programming instruction. The method also includes outputting a sub-sorted list after the performing of the one or more Boolean operation in combination with the one or more permutation operation.

Abstract: A processor pipeline circuit in a processor for non-integral transformation of an image utilizing a single instruction is disclosed. The processor pipeline circuit comprises a data fetch circuit configured to receive a memory address of the input image and fetch a plurality of pixels of the input image. The processor pipeline circuit further comprises a weights access circuit configured to receive an element of the array of offsets and the interpolation type parameter. The weights access circuit is configured to determine weights to be applied to the plurality of pixels of the input image. The processor pipeline circuit further comprises a multiply and add circuit configured to calculate the output pixel of the transformed image by multiplying the plurality of pixels of the input image by the weights and summing each resulting product.

Abstract: A processor pipeline circuit in a processor for non-integral transformation of an image utilizing a single instruction is disclosed. The processor pipeline circuit comprises a data fetch circuit configured to receive a memory address of the input image and fetch a plurality of pixels of the input image. The processor pipeline circuit further comprises a weights access circuit configured to receive an element of the array of offsets and the interpolation type parameter. The weights access circuit is configured to determine weights to be applied to the plurality of pixels of the input image. The processor pipeline circuit further comprises a multiply and add circuit configured to calculate the output pixel of the transformed image by multiplying the plurality of pixels of the input image by the weights and summing each resulting product.

Abstract: Embodiments include apparatuses, systems, and methods for a computer-aided or autonomous driving (CA/AD) system to identify and respond to an audio signal, e.g., an emergency alarm signal. In embodiments, the CA/AD driving system may include a plurality of microphones disposed to capture the audio signal included in surrounding sounds to a semi-autonomous or autonomous (SA/AD) vehicle. In embodiments, an audio analysis unit may receive the audio signal to extract audio features from the audio signal. In embodiments, a neural network such as a Deep Neural Network (DNN) may receive the extracted audio features from the audio analysis unit and to generate a probability score to allow identification of the audio signal. In embodiments, the CA/AD driving system may control driving elements of the SA/AD vehicle to autonomously or semi-autonomously drive the SA/AD vehicle in response to the identification. Other embodiments may also be described and claimed.

Abstract: Embodiments include apparatuses, systems, and methods for a computer-aided or autonomous driving (CA/AD) system to identify and respond to an audio signal, e.g., an emergency alarm signal. In embodiments, the CA/AD driving system may include a plurality of microphones disposed to capture the audio signal included in surrounding sounds to a semi-autonomous or autonomous (SA/AD) vehicle. In embodiments, an audio analysis unit may receive the audio signal to extract audio features from the audio signal. In embodiments, a neural network such as a Deep Neural Network (DNN) may receive the extracted audio features from the audio analysis unit and to generate a probability score to allow identification of the audio signal. In embodiments, the CA/AD driving system may control driving elements of the SA/AD vehicle to autonomously or semi-autonomously drive the SA/AD vehicle in response to the identification. Other embodiments may also be described and claimed.

Abstract: An apparatus comprising at least one processor and at least one memory including computer program code The at least one memory and the computer program code is configured to, with the at least one processor, cause the apparatus at least to perform determining a covariance matrix for at least one frequency band of a first and a second audio signal, non-negative factorizing the covariance matrix to determine at least one first weighting value and at least one second weighting value associated with the at least one frequency band; and determining a third audio signal associated with the at least one frequency band by combining the first weighting value and the first audio signal to the second weighting value and the second audio signal.

Abstract: An apparatus comprising at least one processor and at least one memory including computer program code The at least one memory and the computer program code is configured to, with the at least one processor, cause the apparatus at least to perform determining a covariance matrix for at least one frequency band of a first and a second audio signal, non-negative factorizing the covariance matrix to determine at least one first weighting value and at least one second weighting value associated with the at least one frequency band; and determining a third audio signal associated with the at least one frequency band by combining the first weighting value and the first audio signal to the second weighting value and the second audio signal.