Abstract: An encoding apparatus for encoding a digital signal and a decoding apparatus for decoding the encoded signal. This encoding apparatus comprises a time series sample buffer for dividing an input signal into blocks, an orthogonal transform encoding section for transforming the signals every blocks into spectrum signals, and an entropy encoding section for implementing variable length encoding to all or a portion of the spectrum signals every blocks. At the entropy encoding section, there are provided an upper limit setting circuit for setting upper limit in the number of bits per each block of a signal encoded and outputted, and a bit number judging circuit for stopping outputting of a portion of spectrum signals in a block or blocks where the number of bits above the upper limit is required. The number of bits per each block is caused to have upper limit to stop recording or transmission of a portion of spectrum signals in a block or blocks where the number of bits above the upper limit is required.

Abstract: A signal encoding method and apparatus for encoding an acoustic signal, a recording medium having the encoded signals, a method for transmitting the encoded signals, and a signal decoding apparatus for decoding the encoded signals, are disclosed. With the encoding apparatus, an attack portion detection circuit detects an attack portion of the waveform acoustic signal where the waveform elements of the waveform acoustic signal rise sharply. A gain control circuit controls the gain for waveform elements at least upstream of the attack portion using a gain control amount adaptively selected from plural gain control amounts specified by a pre-set power of 2. A forward orthogonal transform circuit transforms the waveform acoustic signal into plural spectral components. A normalization and encoding circuit normalizes, quantizes and encodes the gain control information an plural spectral components.

Abstract: An apparatus for encoding data includes adaptive bit allocation encoding circuitry that normalizes frames of input spectrum data into transform frames in accordance with normalization coefficients and number of quantization step information. Quantized data encoding circuitry encodes each transform frame of normalized spectrum data with at least one selected code table of a plurality of code tables in accordance with a code table selection signal. Code train generation circuitry generates a code train that includes the encoded normalized spectrum data and information indicative of the at least one selected code table and of the normalization coefficients and number of quantization step information in accordance with which the encoding circuitry normalizes each frame of input spectrum data. Control circuitry generates the code table selection signal, the number of quantization step information, and the normalization coefficients in response to the input spectrum data.

Abstract: In this invention, an approach is employed to carry out blocking of an input signal to transform the blocked signals into spectrum signals to divide the spectrum signals into a plurality of units to normalize them thereafter to implement variable length encoding to all or a portion of the spectrum signals to output the variable-length encoded signals along with normalization coefficient and the number of re-quantization bits of each unit, wherein an upper limit is provided with respect to the number of bits per each block of a signal to be encoded and outputted to compulsorily change, in a block for which the number of bits above the upper limit is required, normalization coefficient of at least one unit thereafter to re-quantize and entropy-encode a corresponding signal to output the encoded spectrum signal, thereby permitting hardware scale to be smaller as compared to the conventional apparatus without depending upon unevenness of the number of bits by variable length encoding.

Abstract: A signal encoding apparatus for encoding an acoustic signal. This signal encoding apparatus includes a transform circuit for transforming an inputted acoustic signal into frequency components, a signal component separating circuit for separating an output of the transform circuit into tone characteristic components and noise characteristic components, a tone characteristic encoding circuit for encoding a signal of tone characteristic components, and a noise characteristic component encoding circuit for encoding a signal of noise characteristic components, wherein the tone characteristic component encoding circuit encodes respective signal components of the signal of tone characteristic components so that they respectively have different code lengths to thereby improve efficiency of encoding without degrading sound quality with respect to acoustic signal of tone characteristic.

Abstract: In this invention, in the case of transforming an input waveform signal into frequency components at a frequency component decomposing circuit 701 to allow the frequency components from the frequency component decomposing circuit 701 to undergo normalization and quantization, and encoding at a normalizing/quantizing circuit 702 and a code train generating circuit 703, operation of QMF is omitted with respect to bands of the unnecessary side by a processing band control circuit 704, whereby the number of operations necessary for filter operation is reduced so that high speed operation can be carried out and work area necessary for filter operation can be reduced. Namely, this invention can simplify filter operation in accordance with, e.g., required quality of reproduction signal, and can reduce circuit scale of encoding unit/decoding unit.

Abstract: An encoding apparatus for encoding a digital signal and a decoding apparatus for decoding the encoded signal.This encoding apparatus comprises a time series sample buffer for dividing an input signal into blocks, an orthogonal transform encoding section for transforming the signals every blocks into spectrum signals, and an entropy encoding section for implementing variable length encoding to all or a portion of the spectrum signals every blocks. At the entropy encoding section, there are provided an upper limit setting circuit for setting upper limit in the number of bits per each block of a signal encoded and outputted, and a bit number judging circuit for stopping outputting of a portion of spectrum signals in a block or blocks where the number of bits above the upper limit is required. The number of bits per each block is caused to have upper limit to stop recording or transmission of a portion of spectrum signals in a block or blocks where the number of bits above the upper limit is required.

Abstract: According to the present invention, for encoding input signals, the input signals are transformed into frequency components, and the frequency components are separated into a first signal composed of tonal components and a second signal composed of other components. The first and second signals are encoded respectively, and code strings for transmission or recording are generated on the basis of encoded signals resulting from first and second encoding. For example, only the first signal is encoded and the code string is caused to include partial information strings grouped so as to have common values on the basis of at least one of reference parameters pertaining to the signal separation and parameters pertaining to the first encoding. Thus, more efficient encoding than in the conventional technique can be realized.

Abstract: An MDCT calculating circuit includes an x.sub.01 calculating circuit for multiplying input signals with a forward transforming window and a linear forward transforming unit for linear forward transforming an output signal of the calculating circuit. The linear forward transforming unit includes an x.sub.02 calculating circuit and an x.sub.03 calculating circuit for pre-processing the output signal of the x.sub.01 calculating circuit and an integration and summation processing circuit for executing integration and summation processing operations on an output signal of the pre-processing unit. The integration and summation processing circuit executes an integration and summation operation on an N/2 number of input signals from the pre-processing unit by grouping a k number of input signals as a processing unit and iteratively executes the integration and summation processing operations a N/(2*K) number of times for outputting a sum total of N/2 number of signals.

Abstract: An MDCT calculating circuit includes an x.sub.01 calculating circuit for multiplying input signals with a forward transforming window and a linear forward transforming unit for linear forward transforming an output signal of the calculating circuit. The linear forward transforming unit includes an x.sub.02 calculating circuit and an x.sub.03 calculating circuit for pre-processing the output signal of the x.sub.01 calculating circuit and an integration and summation processing circuit for executing integration and summation processing operations on an output signal of the pre-processing unit. The integration and summation processing circuit executes an integration and summation operation on an N/2 number of input signals from the pre-processing unit by grouping a k number of input signals as a processing unit and iteratively executes the integration and summation processing operations a N/(2*K) number of times for outputting a sum total of N/2 number of signals.

Abstract: A data encoding method apparatus in which the volume of arithmetic-logical operations for calculating the total number of bits required for encoding for adaptive bit allocation in the variable length encoding system for expediting the processing. In the data encoding apparatus for encoding and subsequently variable length encoding the input data, spectral data obtained on orthogonal transform coding are routed to a block floating circuit 403 for normalization and re-quantized in a quantization circuit 404 depending on the bit allocation number information from a bit allocation calculating circuit 406 so as to be then variable length encoded by an encoding circuit 407 and outputted at an output terminal 408.