Abstract: The outdoor display apparatus has a display unit, a blowing unit which generates air along the display unit, and a channel part which emits the air passed the display unit, wherein the channel part is extended to the lower part of the displaying unit from its side part, and at least a portion of the channel part is laid underground.

Abstract: An image signal processing apparatus for converting an interlace signal which creates a frame image by alternately displaying an odd field and an even field on a single screen into a progressive signal, includes a line memory for storing the interlace signal, a writing/reading portion for writing/reading the interlace signal into/from the line memory, a signal generation portion for generating a prescribed signal, a selector for selectively outputting the interlace signal from the line memory or the prescribed signal from the signal generation portion, and a controller for controlling signal selection by the selector.

Abstract: The outdoor display apparatus has a display unit, a blowing unit which generates air along the display unit, and a channel part which emits the air passed the display unit, wherein the channel part is extended to the lower part of the displaying unit from its side part, and at least a portion of the channel part is laid underground.

Abstract: According to preferred embodiments of the present invention, an image signal processing apparatus for converting an interlace signal which creates a frame image by alternately displaying an odd field and an even field on a single screen into a progressive signal, includes a line memory for storing the interlace signal, a writing/reading portion for writing/reading the interlace signal into/from the line memory, a signal generation portion for generating a prescribed signal, a selector for selectively outputting the interlace signal from the line memory or the prescribed signal from the signal generation portion, and a controller for controlling signal selection by the selector.

Abstract: A 4:4:4 component video signal comprising a luminance signal Y and color-difference signals Cb and Cr is transformed to a 4:1:1 component coded video signal coded by a coding device, reducing processing is carried out after transformation and the result is written into the frame memory based on an enable signal. At this point, the pulse number of the enable signal ENy of the reduced luminance signal is counted, the differential between the horizontal pixel number when the reduced color-difference signals are decoded to the original 4:4:4 component video signal and the horizontal pixel number of the reduced luminance signal is determined, a dummy pulse of this differential is generated and the dummy pulse portion only of the writing address of the frame memory for the reduced luminance signal is shifted backwards. Reduced signals read out from the frame memory are outputted after being decoded to the original 4:4:4 component video signal by the decoding device.