Patents by Inventor Mitsuaki Osamè

Mitsuaki Osamè has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8975632
    Abstract: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: March 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Yoshifumi Tanada, Mitsuaki Osame, Aya Anzai, Ryota Fukumoto
  • Patent number: 8957836
    Abstract: A light emitting device capable of suppressing drop in luminance or luminance unevenness of a light emitting element due to deterioration of an electro luminescent material and capable of switching an image direction vertically to horizontally without a frame memory additionally provided. The light emitting device of the invention comprises in each pixel first to fourth transistors, a light emitting element, and a signal line. The first transistor and the second transistor control the connection between the signal line and a gate of the third transistor, the fourth transistor controls a current value supplied to the light emitting element, and the third transistor selects whether the current is supplied to the light emitting element or not. Further, the first transistor and the second transistor are switched separately.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: February 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Mitsuaki Osame, Yu Yamazaki, Aya Anzai
  • Patent number: 8947325
    Abstract: A display device having a first pixel electrode and a second pixel electrode whose areas are different from each other is provided. In the display device, the first pixel electrode and the second pixel electrode are electrically connected to a first transistor and a second transistor, respectively. Gates of the first transistor and the second transistor are electrically connected to each other. A potential is supplied to the first pixel electrode and the second pixel electrode through a wiring electrically connected to the first transistor and the second transistor.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: February 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Aya Anzai, Mitsuaki Osame, Shunpei Yamazaki
  • Publication number: 20150008440
    Abstract: An object of the present invention is to provide a semiconductor device having high operation characteristic and reliability. The measures taken are: A pixel capacitor is formed between an electrode comprising anodic capable material over an organic resin film, an anodic oxide film of the electrode and a pixel electrode above. Since the anodic oxide film is anodically oxidized by applied voltage per unit time at 15V/min, there is no wrap around on the electrode, and film peeling can be prevented.
    Type: Application
    Filed: September 23, 2014
    Publication date: January 8, 2015
    Inventors: Satoshi MURAKAMI, Shunpei YAMAZAKI, Jun KOYAMA, Mitsuaki OSAME, Yukio TANAKA, Yoshiharu HIRAKATA
  • Patent number: 8927994
    Abstract: Disclosed is a display device and an electronic apparatus incorporating the display device. The display device includes a transistor and a planarization film over the transistor. The planarization film has an opening where an edge portion is rounded. The display device further includes a first electrode over the planarization film and an organic resin film over the first electrode. The organic resin film also has an opening where an edge portion is rounded. The organic resin film is located in the opening of the planarization film. The first electrode and the transistor are electrically connected to each other through a conductive film. The first electrode is in contact with a top surface of the conductive film. Over the first electrode, a light-emitting member and a second electrode are provided.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: January 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Murakami, Mitsuaki Osame
  • Publication number: 20150001545
    Abstract: It is an object of the present invention to provide a semiconductor display device having an interlayer insulating film which can obtain planarity of a surface while controlling film formation time, can control treatment time of heating treatment with an object of removing moisture, and can prevent moisture in the interlayer insulating film from being discharged to a film or an electrode adjacent to the interlayer insulating film. An inorganic insulating film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover a TFT. Next, an organic resin film containing photosensitive acrylic resin is applied to the organic insulting film, and the organic resin film is partially exposed to light to be opened. Thereafter, an inorganic insulting film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover the opened organic resin film.
    Type: Application
    Filed: September 9, 2014
    Publication date: January 1, 2015
    Inventors: Shunpei YAMAZAKI, Satoshi MURAKAMI, Masahiko HAYAKAWA, Kiyoshi KATO, Mitsuaki OSAME
  • Publication number: 20140299991
    Abstract: It is an object of the present invention to prevent an influence of voltage drop due to wiring resistance, trouble in writing of a signal into a pixel, and trouble in gray scales, and provide a display device with higher definition, represented by an EL display device and a liquid crystal display device. In the present invention, a wiring including Cu is provided as an electrode or a wiring used for the display device represented by the EL display device and the liquid crystal display device. Besides, sputtering is performed with a mask to form the wiring including Cu. With such structure, it is possible to reduce the voltage drop and a deadened signal.
    Type: Application
    Filed: June 5, 2014
    Publication date: October 9, 2014
    Inventors: Shunpei YAMAZAKI, Mitsuaki OSAME
  • Publication number: 20140291657
    Abstract: A light emitting device and an element substrate which are capable of suppressing variations in the luminance intensity of a light emitting element among pixels due to characteristic variations of a driving transistor without suppressing off-current of a switching transistor low and increasing storage capacity of a capacitor. According to the invention, a depletion mode transistor is used as a driving transistor. The gate of the driving transistor is fixed in its potential or connected to the source or drain thereof to operate in a saturation region with a constant current flow. A current controlling transistor which operates in a linear region is connected in series to the driving transistor, and a video signal for transmitting a light emission or non-emission of a pixel is inputted to the gate of the current controlling transistor through a switching transistor.
    Type: Application
    Filed: June 16, 2014
    Publication date: October 2, 2014
    Inventors: Mitsuaki Osame, Aya Anzai, Yu Yamazaki
  • Patent number: 8847316
    Abstract: An object of the present invention is to provide a semiconductor device having high operation characteristic and reliability. The measures taken are: A pixel capacitor is formed between an electrode comprising anodic capable material over an organic resin film, an anodic oxide film of the electrode and a pixel electrode above. Since the anodic oxide film is anodically oxidized by applied voltage per unit time at 15V/min, there is no wrap around on the electrode, and film peeling can be prevented.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: September 30, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Shunpei Yamazaki, Jun Koyama, Mitsuaki Osame, Yukio Tanaka, Yoshiharu Hirakata
  • Patent number: 8835271
    Abstract: It is an object of the present invention to provide a semiconductor display device having an interlayer insulating film which can obtain planarity of a surface while controlling film formation time, can control treatment time of heating treatment with an object of removing moisture, and can prevent moisture in the interlayer insulating film from being discharged to a film or an electrode adjacent to the interlayer insulating film. An inorganic insulating film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover a TFT. Next, an organic resin film containing photosensitive acrylic resin is applied to the organic insulting film, and the organic resin film is partially exposed to light to be opened. Thereafter, an inorganic insulting film containing nitrogen, which is less likely to transmit moisture compared with an organic resin, is formed so as to cover the opened organic resin film.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: September 16, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Murakami, Masahiko Hayakawa, Kiyoshi Kato, Mitsuaki Osame
  • Publication number: 20140191239
    Abstract: Disclosed is a display device and an electronic apparatus incorporating the display device. The display device includes a transistor and a planarization film over the transistor. The planarization film has an opening where an edge portion is rounded. The display device further includes a first electrode over the planarization film and an organic resin film over the first electrode. The organic resin film also has an opening where an edge portion is rounded. The organic resin film is located in the opening of the planarization film. The first electrode and the transistor are electrically connected to each other through a conductive film. The first electrode is in contact with a top surface of the conductive film. Over the first electrode, a light-emitting member and a second electrode are provided.
    Type: Application
    Filed: March 11, 2014
    Publication date: July 10, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Murakami, Mitsuaki Osame
  • Patent number: 8759825
    Abstract: A light emitting device and an element substrate which are capable of suppressing variations in the luminance intensity of a light emitting element among pixels due to characteristic variations of a driving transistor without suppressing off-current of a switching transistor low and increasing storage capacity of a capacitor. According to the invention, a depletion mode transistor is used as a driving transistor. The gate of the driving transistor is fixed in its potential or connected to the source or drain thereof to operate in a saturation region with a constant current flow. A current controlling transistor which operates in a linear region is connected in series to the driving transistor, and a video signal for transmitting a light emission or non-emission of a pixel is inputted to the gate of the current controlling transistor through a switching transistor.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: June 24, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai, Yu Yamazaki
  • Patent number: 8760374
    Abstract: When a thin film transistor has an LDD structure or a double gate structure, the number of manufacturing steps increases, which may decrease the yield. The invention provides a display device where the influence of off current is reduced by a method different from the conventional one. According to the invention, a pass element is provided at one electrode of a light emitting element so as not to flow the off current of a transistor for driving the light emitting element through the light emitting element in a non-lighting period. The pass element allows the off current to flow outside, that is, the off current can be bypassed outside through the pass element.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: June 24, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai, Yu Yamazaki
  • Publication number: 20140171155
    Abstract: A potential of a gate of a driving transistor is fixed, and the driving transistor is operated in a saturation region, so that a current is supplied thereto anytime. A current control transistor operating in a linear region is disposed serially with the driving transistor, and a video signal for transmitting a signal of emission or non-emission of the pixel is input to a gate of the current control transistor via a switching transistor.
    Type: Application
    Filed: February 19, 2014
    Publication date: June 19, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai, Yu Yamazaki, Ryota Fukumoto
  • Publication number: 20140168196
    Abstract: A light emitting device that achieves long life, and which is capable of performing high duty drive, by suppressing initial light emitting element deterioration is provided. Reverse bias application to an EL element (109) is performed one row at a time by forming a reverse bias electric power source line (112) and a reverse bias TFT (108). Reverse bias application can therefore be performed in synchronous with operations for write-in of an image signal, light emission, erasure, and the like. Reverse bias application therefore becomes possible while maintaining a duty equivalent to that of a conventional driving method.
    Type: Application
    Filed: February 21, 2014
    Publication date: June 19, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai, Yoshifumi Tanada, Keisuke Miyagawa, Satoshi Seo, Shunpei Yamazaki
  • Patent number: 8748895
    Abstract: Disclosed is a display device and an electronic apparatus incorporating the display device. The display device includes a transistor and a planarization film over the transistor. The planarization film has an opening where an edge portion is rounded. The display device further includes a first electrode over the planarization film and an organic resin film over the first electrode. The organic resin film also has an opening where an edge portion is rounded. The organic resin film is located in the opening of the planarization film. The first electrode and the transistor are electrically connected to each other through a conductive film. The first electrode is in contact with a top surface of the conductive film. Over the first electrode, a light-emitting member and a second electrode are provided.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: June 10, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Murakami, Mitsuaki Osame
  • Patent number: 8749061
    Abstract: It is an object of the present invention to prevent an influence of voltage drop due to wiring resistance, trouble in writing of a signal into a pixel, and trouble in gray scales, and provide a display device with higher definition, represented by an EL display device and a liquid crystal display device. In the present invention, a wiring including Cu is provided as an electrode or a wiring used for the display device represented by the EL display device and the liquid crystal display device. Besides, sputtering is performed with a mask to form the wiring including Cu. With such structure, it is possible to reduce the voltage drop and a deadened signal.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: June 10, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Mitsuaki Osame
  • Publication number: 20140151707
    Abstract: The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds times longer than that of the existing one, and thereby allowing turning to an on-state at a gate voltage particularly higher than the existing one and driving, and allowing having a low channel conductance gd. According to the present invention, not only the simple dispersion of on-current but also the normalized dispersion thereof can be reduced, and other than the reduction of the dispersion between the individual TFTs, the dispersion of the OLEDs themselves and the dispersion due to the deterioration of the OLED can be reduced.
    Type: Application
    Filed: February 5, 2014
    Publication date: June 5, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Makoto Udagawa, Masahiko Hayakawa, Jun Koyama, Mitsuaki Osame, Aya Anzai
  • Patent number: 8730215
    Abstract: The present invention provides a data latch circuit which can operate stably with a low-amplitude signal, which consumes less electric power, and which is resistant against the variation in TFTs. When an analog switch is turned on, a data signal is inputted to a gate electrode of an n-channel TFT and, at this time, VDD is supplied to an input terminal of an inverter. When the analog switch in turned off, the n-channel TFT is turned on or off depending on a level of the data signal. When the data signal is at an H level, the n-channel TFT is turned on and VSS is supplied to the input terminal of the inverter. When the data signal is at an L level, VDD is supplied to an input terminal of the inverter. Therefore, only VDD and VSS levels are applied to the input terminal of the inverter.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: May 20, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Tatsuo Ueno
  • Patent number: 8723760
    Abstract: A-light-emitting device which realizes a high aperture ratio and in which the quality of image is little affected by the variation in the characteristics of TFTs. A large holding capacitor Cs is not provided in the pixel portion but, instead, the channel length and the channel width of the driving TFTs are increased, and the channel capacitance is utilized as Cs. The channel length is selected to be very larger than the channel width to improve current characteristics in the saturated region, and a high VGS is applied to the driving TFTs to obtain a desired drain current. Therefore, the drain currents of the driving TFTs are little affected by the variation in the threshold voltage. In laying out the pixels, further, wiring is arranged under the partitioning wall and the driving TFTs are arranged under the wiring in order to avoid a decrease in the aperture ratio despite of an increase in the size of the driving TFT.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: May 13, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai, Jun Koyama, Makoto Udagawa, Masahiko Hayakawa, Shunpei Yamazaki