Patents by Inventor Mitsuaki Shiraga

Mitsuaki Shiraga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11446113
    Abstract: The present disclosure relates to a surgery support system, a display control device, and a display control method in which a plurality of images can be displayed in an easy-to-see and efficient manner. An information processing device generates a composite image by compositing images output from a plurality of electronic instruments including a medical instrument, and adds, to the composite image, metadata related to division of the composite image. The display control device controls a display device to display, in the virtual three-dimensional space, divided images obtained by dividing the composite image into a plurality of divided regions on the basis of the metadata. The present disclosure can be applied to an endoscopic surgical system, for example.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: September 20, 2022
    Assignee: SONY CORPORATION
    Inventors: Takuya Nakamura, Shinji Katsuki, Mitsuaki Shiraga, Manabu Hatakenaka
  • Publication number: 20210346116
    Abstract: The present disclosure relates to a surgery support system, a display control device, and a display control method in which a plurality of images can be displayed in an easy-to-see and efficient manner. An information processing device generates a composite image by compositing images output from a plurality of electronic instruments including a medical instrument, and adds, to the composite image, metadata related to division of the composite image. The display control device controls a display device to display, in the virtual three-dimensional space, divided images obtained by dividing the composite image into a plurality of divided regions on the basis of the metadata. The present disclosure can be applied to an endoscopic surgical system, for example.
    Type: Application
    Filed: September 6, 2019
    Publication date: November 11, 2021
    Inventors: TAKUYA NAKAMURA, SHINJI KATSUKI, MITSUAKI SHIRAGA, MANABU HATAKENAKA
  • Publication number: 20200306000
    Abstract: There is provided a medical control apparatus including an illumination control unit that performs, based on a detection result of brightness relating to imaging, a first control of controlling brightness of a light source of an observation device for observing an observation target and a second control of controlling brightness of an illumination apparatus that irradiates the observation target with illumination light from an outside of the observation device.
    Type: Application
    Filed: September 12, 2018
    Publication date: October 1, 2020
    Applicant: Sony Olympus Medical Solutions Inc.
    Inventors: Yasuhiro OKABE, Mitsuaki SHIRAGA, Tomonori ISHIKAWA
  • Publication number: 20200312464
    Abstract: The present disclosure provides a medical information processing apparatus that comprises: a selection unit that selects, from among candidate data including surgery data acquired during surgery, target data corresponding to selection conditions that include a condition relating to a patient attribute, a condition relating to a surgical-procedure type, and a condition relating to a disease type; an extraction unit that detects a feature from the selected target data and extracts, from the target data, feature data corresponding to the detected feature; and an editing processing unit that edits the extracted feature data, wherein the extraction unit extracts at least a medical image as the feature data.
    Type: Application
    Filed: October 2, 2018
    Publication date: October 1, 2020
    Applicant: Sony Olympus Medical Solutions Inc.
    Inventor: Mitsuaki SHIRAGA
  • Patent number: 8184690
    Abstract: An image processing apparatus able to encode and decode images by a low cost, small sized circuit configuration, having a temporary storage portion for temporarily storing data, an encoding/decoding processing portion for reading and writing data successively with respect to the temporary storage portion and encoding and decoding the image data in parallel, and a storage control portion for controlling the read and write operations of the data with respect to the temporary storage portion, wherein the storage control portion controls the read and write operations with respect to the temporary storage portion by the encoding/decoding processing portion in the encoding processing and at least read and write operations to the temporary storage portion by the encoding/decoding processing portion in the decoding processing so as to be performed within one frame's worth or one field's worth of processing period in a time division manner.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: May 22, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuji Sumioka, Mitsuaki Shiraga, Yukio Yanagita
  • Patent number: 7738726
    Abstract: A block distortion reduction apparatus, enabling easy processing by a small-sized circuit configuration and enabling generation of block distortion reduction parameters by any area unit inside a frame, which averages encoding coefficients in a macroblock units to obtain a DCT parameter, calculates a DMV parameter of differential motion vectors by weighting in accordance with the encoding mode of the macroblock unit, and determines a correction value for the block distortion reduction based on these parameters.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: June 15, 2010
    Assignee: Sony Corporation
    Inventors: Kimiyasu Honma, Mitsuaki Shiraga, Hiroshi Kobayashi
  • Patent number: 7515631
    Abstract: An image processing apparatus able to encode and decode images by a low cost, small sized circuit configuration, having a temporary storage portion for temporarily storing data, an encoding/decoding processing portion for reading and writing data successively with respect to the temporary storage portion and encoding and decoding the image data in parallel, and a storage control portion for controlling the read and write operations of the data with respect to the temporary storage portion, wherein the storage control portion controls the read and write operations with respect to the temporary storage portion by the encoding/decoding processing portion in the encoding processing and at least read and write operations to the temporary storage portion by the encoding/decoding processing portion in the decoding processing so as to be performed within one frame's worth or one field's worth of processing period in a time division manner.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: April 7, 2009
    Assignee: Sony Corporation
    Inventors: Tetsuji Sumioka, Mitsuaki Shiraga, Yukio Yanagita
  • Publication number: 20090051808
    Abstract: An image processing apparatus able to encode and decode images by a low cost, small sized circuit configuration, having a temporary storage portion for temporarily storing data, an encoding/decoding processing portion for reading and writing data successively with respect to the temporary storage portion and encoding and decoding the image data in parallel, and a storage control portion for controlling the read and write operations of the data with respect to the temporary storage portion, wherein the storage control portion controls the read and write operations with respect to the temporary storage portion by the encoding/decoding processing portion in the encoding processing and at least read and write operations to the temporary storage portion by the encoding/decoding processing portion in the decoding processing so as to be performed within one frame's worth or one field's worth of processing period in a time division manner.
    Type: Application
    Filed: October 21, 2008
    Publication date: February 26, 2009
    Applicant: SONY CORPORATION
    Inventors: Tetsuji SUMIOKA, Mitsuaki Shiraga, Yukio Yanagita
  • Patent number: 7149828
    Abstract: The present invention is to provide a bus arbitration apparatus and a bus arbitration method not reducing data transfer capability as a whole and preventing a loss of transferred data. It performs the arbitration with priority in response to properties of bus masters. It sequentially arbitrates a first hierarchy bus master of which requests are urgent, a second hierarchy bus master that requests data processing in real time, and a third hierarchy bus master that is neither a first hierarchy bus master nor a second hierarchy bus master sequentially.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: December 12, 2006
    Assignee: Sony Corporation
    Inventors: Atsushi Hayashi, Mitsuaki Shiraga, Katsuhiko Yamanaka
  • Publication number: 20050240707
    Abstract: The present invention is to provide a bus arbitration apparatus and a bus arbitration method not reducing data transfer capability as a whole and preventing a loss of transferred data. It performs the arbitration with priority in response to properties of bus masters. It sequentially arbitrates a first hierarchy bus master of which requests are urgent, a second hierarchy bus master that requests data processing in real time, and a third hierarchy bus master that is neither a first hierarchy bus master nor a second hierarchy bus master sequentially.
    Type: Application
    Filed: April 26, 2005
    Publication date: October 27, 2005
    Applicant: Sony Corporation
    Inventors: Atsushi Hayashi, Mitsuaki Shiraga, Katsuhiko Yamanaka
  • Publication number: 20050018922
    Abstract: A block distortion reduction apparatus, enabling easy processing by a small-sized circuit configuration and enabling generation of block distortion reduction parameters by any area unit inside a frame, which averages encoding coefficients in a macroblock units to obtain a DCT parameter, calculates a DMV parameter of differential motion vectors by weighting in accordance with the encoding mode of the macroblock unit, and determines a correction value for the block distortion reduction based on these parameters.
    Type: Application
    Filed: June 17, 2004
    Publication date: January 27, 2005
    Applicant: Sony Corporation
    Inventors: Kimiyasu Honma, Mitsuaki Shiraga, Hiroshi Kobayashi
  • Publication number: 20050018915
    Abstract: An image processing apparatus able to encode and decode images by a low cost, small sized circuit configuration, having a temporary storage portion for temporarily storing data, an encoding/decoding processing portion for reading and writing data successively with respect to the temporary storage portion and encoding and decoding the image data in parallel, and a storage control portion for controlling the read and write operations of the data with respect to the temporary storage portion, wherein the storage control portion controls the read and write operations with respect to the temporary storage portion by the encoding/decoding processing portion in the encoding processing and at least read and write operations to the temporary storage portion by the encoding/decoding processing portion in the decoding processing so as to be performed within one frame's worth or one field's worth of processing period in a time division manner.
    Type: Application
    Filed: June 15, 2004
    Publication date: January 27, 2005
    Applicant: Sony Corporation
    Inventors: Tetsuji Sumioka, Mitsuaki Shiraga, Yukio Yanagita
  • Patent number: 6678749
    Abstract: An apparatus and method for efficiently performing data transfer operations in an electronic system preferably includes a plurality of buffers that may store data and commands during execution of data transfer operations. Initially, at least a portion of a plurality of commands defining data transfer operations between a memory and peripheral devices may be temporarily stored in a command buffer associated with a processor interface. The processor interface may then issue commands directly to a memory interface, peripheral devices, and peripheral interfaces within the electronic system. Commands received by the memory interface may be temporarily stored in a command buffer associated with the memory interface. When a memory associated with the memory interface is ready, the memory interface may access the memory, and transfer data to or from one or more buffers associated with a peripheral device.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: January 13, 2004
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Praveen K. Kolli, Harry Chue, Mitsuaki Shiraga
  • Publication number: 20030005185
    Abstract: An apparatus and method for efficiently performing data transfer operations in an electronic system preferably includes a plurality of buffers that may store data and commands during execution of data transfer operations. Initially, at least a portion of a plurality of commands defining data transfer operations between a memory and peripheral devices may be temporarily stored in a command buffer associated with a processor interface. The processor interface may then issue commands directly to a memory interface, peripheral devices, and peripheral interfaces within the electronic system. Commands received by the memory interface may be temporarily stored in a command buffer associated with the memory interface. When a memory associated with the memory interface is ready, the memory interface may access the memory, and transfer data to or from one or more buffers associated with a peripheral device.
    Type: Application
    Filed: June 28, 2001
    Publication date: January 2, 2003
    Applicant: Sony Corporation and Sony Electronics, Inc.
    Inventors: Praveen K. Kolli, Harry Chue, Mitsuaki Shiraga
  • Publication number: 20020169908
    Abstract: An apparatus and method for implementing a flexible arbitration mechanism in an electronic system may preferably include a plurality of command sources coupled to the electronic system for generating pending commands. An arbiter coupled to the electronic system may preferably reference a configurable arbitration table to choose a next table entry corresponding to a selected command from the pending commands for execution by the electronic system. The arbitration table may preferably include ordered entries that correspond to the pending commands. The arbiter may preferably reference the configurable arbitration table during a table analysis sequence to thereby identify the foregoing selected command.
    Type: Application
    Filed: May 8, 2001
    Publication date: November 14, 2002
    Applicant: Sony Corporation
    Inventor: Mitsuaki Shiraga
  • Patent number: 6097843
    Abstract: In an encoder as a compression encoding apparatus for compression encoding an inputted image signal in accordance with a rule of the MPEG or the like, other compression and decompression different from a main compression encoding which is executed by a motion detection/compensation processing circuit, a discrete cosine transforming/quantizing circuit, and a Huffman encoding circuit are executed. The compression and decompression are executed by a signal compressing circuit and a signal decompressing circuit. As mentioned above, by reducing an amount of information that is written into a memory provided in association with the compression encoding apparatus, a capacity of the memory can be decreased. By executing other compression and decompression different from a decoding process corresponding to the compression encoding to a decoding apparatus according to the rule of the MPEG or the like, a capacity of a memory provided in association with the decoding apparatus can be reduced.
    Type: Grant
    Filed: January 22, 1998
    Date of Patent: August 1, 2000
    Assignee: Sony Corporation
    Inventors: Masatoshi Takashima, Mitsuaki Shiraga
  • Patent number: 5494746
    Abstract: An acrylic fiber has 99.9 to 85 mol % of acrylonitrile units, and 0.1 to 15 mol % of N-vinylcarboxylic acid amide units, wherein the latter unit may be modified. The fiber is excellent, e.g., in dyeing property and hygroscopicity, and can be readily converted into a functional fiber.
    Type: Grant
    Filed: April 14, 1994
    Date of Patent: February 27, 1996
    Assignee: Mitsubishi Kasei Corporation
    Inventors: Mitsuaki Shiraga, Hiroyshi Okada, Shigeru Sawayama, Yukino Yamada
  • Patent number: 5064909
    Abstract: Disclosed herein is a vinylamine copolymer having the structural units represented by the following formulas (I), (II), (III), (IV) and (V): ##STR1## wherein x.sup..crclbar. represents an anion or hydroxyl ion, R represents a hydrogen atom or a methyl group, M.sup..sym. represents a hydrogen ion or a monovalent cation, in which the molar fraction of the structural unit (I) is 5 to 85% by mole, the molar fraction of the structural unit (II) is 2 to 85% by mole, the molar fraction of the structural unit (III) is 5 to 80% by mole, the molar fraction of the structural unit (IV) is 0 to 40% by mole, all of said molar fractions being based on the vinylamine copolymer, and the molar fraction of the structural unit (V) is 0 to 8% by mole which is based on the total content of the structural units (III), (IV), and (V), a flocculating agent and a paper strength increasing agent using the vinylamine copolymer, and a process for producing the vinylamine copolymer.
    Type: Grant
    Filed: August 7, 1990
    Date of Patent: November 12, 1991
    Assignee: Mitsubishi Kasei Corporation
    Inventors: Takaharu Itagaki, Mitsuaki Shiraga, Shigeru Sawayama, Kohichi Satoh
  • Patent number: RE34713
    Abstract: .[.Disclosed herein is a vinylamine copolymer having the structural units represented by the following formulas (I), (II), (III), (IV) and (V): ##STR1## wherein X.sup..crclbar. represents an anion or hydroxyl ion, R represents a hydrogen atom or a methyl group, M.sup..sym. represents a hydrogen ion or a monovalent cation, in which the molar fraction of the structural unit (I) is 5 to 85% by mole, the molar fraction of the structural unit (II) is 2 to 85% by mole, the molar fraction of the structural unit (III) is 5 to 80% by mole, the molar fraction of the structural unit (IV) is 0 to 40% by mole, all of said molar fractions being based on the vinylamine copolymer and the molar fraction of the structural unit (V) is 0 to 8% by mole which is based on the total content of the structural units (III), (IV) and (V), a flocculating agent and a paper strength increasing agent using the vinylamine copolymer, and a process for producing the vinylamine copolymer..]..Iadd.
    Type: Grant
    Filed: September 16, 1992
    Date of Patent: August 30, 1994
    Assignee: Mitsubishi Kasei Corporation
    Inventors: Takaharu Itagaki, Mitsuaki Shiraga, Shigeru Sawayama, Kohichi Satoh
  • Patent number: RE34903
    Abstract: Disclosed herein is a vinylamine copolymer having the structural units represented by the following formulas (I), (II), (III).[.,.]. .Iadd.and .Iaddend.(IV) .[.and (VI).].: ##STR1## wherein x.crclbar. represents an anion or hydroxyl ion R represents a hydrogen atom or a methyl group, M.sym. represents a hydrogen ion or a monovalent cation, in which the molar fraction of the structural unit (I) is 5 to 85% by mole, the molar fraction of the structural unit (II) is 2 to 85% by mole, the molar fraction of the structural unit (III) is 5 to 80% by mole,.[.the molar fraction of the structural unit (IV) is 0 to 40% by mole,.]. all of said molar fractions being based on the vinylamine copolymer, and the molar fraction of the structural unit .[.(V).]. (.Iadd.IV) is 0 to 8% by mole which is based on the total content of the structural units (III).[.,.]. .Iadd.and .Iaddend.(IV), .[.and (V),.].
    Type: Grant
    Filed: November 8, 1993
    Date of Patent: April 11, 1995
    Assignee: Mitsubishi Kasei Corporation
    Inventors: Takaharu Itagaki, Mitsuaki Shiraga, Shigeru Sawayama, Kohichi Satoh