Patents by Inventor Mitsuaki Toda
Mitsuaki Toda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230143088Abstract: A planar antenna board (1) comprises a dielectric (2), an antenna layer (3) formed as a conductor for a signal line on one surface of the dielectric (2), and a ground layer (4) formed as a ground conductor on the other surface of the dielectric (2). The dielectric (2) has: a low-dielectric layer (2a) arranged on the antenna-layer (3) side; an intermediate layer (2b) for which the dielectric constant is higher than that of the low-dielectric layer (2a); and an adhesive layer (2c) for which the glass transition point is higher than that of the intermediate layer (2b), and the water absorption rate is higher than that of the low-dielectric layer (2a). The low-dielectric layer (2a) is arranged on the antenna-layer (3) side with respect to the intermediate layer (2b), and the adhesive layer (2c) is arranged on the ground-layer (4) side with respect to the intermediate layer (2b).Type: ApplicationFiled: March 24, 2020Publication date: May 11, 2023Inventors: Mitsuaki TODA, Kanemitsu NAGAI, Mitsuo IWAMOTO
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Patent number: 9793218Abstract: In a method for manufacturing a device embedded substrate, a conductive via that penetrates a first insulating layer and a second insulating layer from an outer metal layer to reach a second terminal of an IC device is formed after forming the outer metal layer.Type: GrantFiled: May 14, 2013Date of Patent: October 17, 2017Assignee: MEIKO ELECTRONICS CO., LTD.Inventors: Mitsuaki Toda, Tohru Matsumoto, Seiko Murata
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Patent number: 9756732Abstract: A device embedded substrate (20), includes: an insulation layer (12) including an insulation resin material; an electric or electronic device (4) embedded in the insulation layer (12); a terminal (15) serving as an electrode included in the device (4); a conductor pattern (18) formed on the surface of the insulation layer (12); and a conducting via (21) for electrically connecting the conductor pattern (18) and the terminals (15) with each other. The conducting via (21) is made up of a large-diameter section (21a) having a large diameter and a small-diameter section (21b) having a smaller diameter than that of the large-diameter section (21a), in order starting from the conductor pattern (18) toward the terminal (15). A stepped section (17) is formed between the large-diameter section (21a) and the small-diameter section (21b). The large-diameter section (21a) is formed so as to penetrate a sheet-shaped glass cloth (11) disposed in the insulation layer (12).Type: GrantFiled: January 18, 2013Date of Patent: September 5, 2017Assignee: MEIKO ELECTRONICS CO., LTD.Inventors: Yasuaki Seki, Tomoyuki Nagata, Mitsuaki Toda
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Patent number: 9622352Abstract: In a mark forming step in a manufacturing method for a component incorporated substrate in which an electronic component is positioned with reference to a mark formed in a copper layer, when an imaginary line extending from a search center of a search range of a sensor, to an edge side of the search range is represented as a search reference line and an imaginary line extending, in a state in which a mark center, is matched with the search center, from the mark center in the same direction as the search reference line to an outer ridgeline of the mark is represented as a mark reference line, the mark formed in a shape in which the outer ridgeline of the mark is present in a position where a length of the mark reference line is in a range of 30% or more of the search reference line.Type: GrantFiled: September 26, 2012Date of Patent: April 11, 2017Assignee: MEIKO ELECTRONICS CO., LTD.Inventors: Ryoichi Shimizu, Mitsuo Iwamoto, Mitsuaki Toda
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Patent number: 9596765Abstract: A manufacturing method for a component incorporated substrate according to the present invention includes positioning an electronic component with reference to a mark formed on a copper layer, the mark consisting of a material less easily etched than copper by a copper etching agent used for etching of copper, after mounting the electronic component on the copper layer with an adhesive layer interposed therebetween, embedding the electronic component and the mark in an insulating substrate, thereafter, etching and removing a part of the copper layer to form a window for exposing the mark, forming an LVH reaching a terminal of the electronic component with reference to the exposed mark, electrically connecting the terminal and the copper layer via a conduction via formed by applying copper plating to the LVH, and, thereafter, forming the copper layer into a wiring pattern.Type: GrantFiled: September 11, 2012Date of Patent: March 14, 2017Assignee: MEIKO ELECTRONICS CO., LTD.Inventors: Akira Yamaki, Tatsuya Kikuchi, Mitsuaki Toda
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Patent number: 9355990Abstract: The present invention provides a manufacturing method of a device embedded substrate, including: forming a bonding layer of an insulation material on a metal layer formed on a support plate; and mounting an electric or electronic device on the bonding layer, wherein the device is formed of a device main body and a protruding terminal; the bonding layer includes a first bonding body bonded with the metal layer and a second bonding body bonded with the device; the first bonding body is formed along the outer edge of the device; the second bonding body is formed in an area equal or smaller than the area defined by the outer edge of the terminal; and, in the bonding layer forming step, the second bonding body is formed on the first bonding body after the first bonding body is cured.Type: GrantFiled: September 11, 2012Date of Patent: May 31, 2016Assignee: MEIKO ELECTRONICS CO., LTD.Inventors: Tohru Matsumoto, Masaru Ogasawara, Mitsuaki Toda
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Publication number: 20160118346Abstract: A device embedded substrate includes: an insulating layer; a first metal layer and a second metal layer that are formed such that the insulating layer is sandwiched therebetween; a device that is embedded in the insulating layer, and in which a connection terminal non-formation surface where a connection terminal is not formed is located on a side close to the first metal layer; an adhesive layer that is located on the connection terminal non-formation surface of the device; and a conductive via that electrically connects the second metal layer and the connection terminal of the device, wherein an area of the adhesive layer on a surface side in contact with the device is smaller than an area of the connection terminal non-formation surface of the device.Type: ApplicationFiled: May 20, 2013Publication date: April 28, 2016Applicant: MEIKO ELECTRONICS CO., LTD.Inventors: Mitsuaki Toda, Tohru Matsumoto, Ryoichi Shimizu
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Publication number: 20160099215Abstract: In a method for manufacturing a device embedded substrate, a conductive via that penetrates a first insulating layer and a second insulating layer from an outer metal layer to reach a second terminal of an IC device is formed after forming the outer metal layer.Type: ApplicationFiled: May 14, 2013Publication date: April 7, 2016Applicant: MEIKO ELECTRONICS CO., LTD.Inventors: Mitsuaki Toda, Tohru Matsumoto, Seiko Murata
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Publication number: 20150382478Abstract: A device embedded substrate includes an insulating layer including an insulating resin material, a device embedded in the insulating layer, a metal film coating at least one face of the device, and a roughened portion formed by roughening at least part of the surface of the metal film. Preferably, the device embedded substrate further includes: a conductive layer pattern-formed on a bottom face, the bottom face being one face of the insulating layer; and a bonding agent made of a material different from the insulating layer and joining the conductive layer (6) and a mounting face, the mounting face being one face of the device. The metal film is formed only on a face opposite to the mounting face, and the bonding agent has a thickness smaller than a thickness from the metal film to a top face, the top face being the other face of the insulating layer.Type: ApplicationFiled: February 12, 2013Publication date: December 31, 2015Applicant: MEIKO ELECTRONICS CO., LTD.Inventors: Hiroshi SHIMADA, Mitsuaki TODA, Tohru MATSUMOTO
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Publication number: 20150327369Abstract: A device embedded substrate (20), includes: an insulation layer (12) including an insulation resin material; an electric or electronic device (4) embedded in the insulation layer (12); a terminal (15) serving as an electrode included in the device (4); a conductor pattern (18) formed on the surface of the insulation layer (12); and a conducting via (21) for electrically connecting the conductor pattern (18) and the terminals (15) with each other. The conducting via (21) is made up of a large-diameter section (21a) having a large diameter and a small-diameter section (21b) having a smaller diameter than that of the large-diameter section (21a), in order starting from the conductor pattern (18) toward the terminal (15). A stepped section (17) is formed between the large-diameter section (21a) and the small-diameter section (21b). The large-diameter section (21a) is formed so as to penetrate a sheet-shaped glass cloth (11) disposed in the insulation layer (12).Type: ApplicationFiled: January 18, 2013Publication date: November 12, 2015Applicant: MEIKO ELECTRONICS CO., LTD.Inventors: Yasuaki Seki, Tomoyuki Nagata, Mitsuaki Toda
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Publication number: 20150257284Abstract: A method for bending back a rigid printed wiring board with a flexible portion includes: forming a preparation substrate on a surface of a prepreg made of thermosetting resin, the preparation substrate including a conducting layer made of a conductive material; laminating the plurality of preparation substrates; thermally hardening the thermosetting resin so as to integrate the plurality of laminated preparation substrates as an intermediate substrate while heating and pressing together the plurality of preparation substrates; cutting an insulating layer formed by thermally hardening the thermosetting resin in a lamination direction of the preparation substrate so as to form a flexible portion, the flexible portion being thinly formed across opposed both edges of the intermediate substrate to form a complete substrate; bending the flexible portion; bending-back the flexible portion; and dehydrating by raising a temperature of the bent flexible portion before bending-back the flexible portion.Type: ApplicationFiled: March 7, 2014Publication date: September 10, 2015Applicant: MEIKO ELECTRONICS CO., LTD.Inventors: Mitsuaki Toda, Kazuo Shishime, Hisanori Yoshimizu
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Publication number: 20150243628Abstract: The present invention provides a manufacturing method of a device embedded substrate, including: forming a bonding layer of an insulation material on a metal layer formed on a support plate; and mounting an electric or electronic device on the bonding layer, wherein the device is formed of a device main body and a protruding terminal; the bonding layer includes a first bonding body bonded with the metal layer and a second bonding body bonded with the device; the first bonding body is formed along the outer edge of the device; the second bonding body is formed in an area equal or smaller than the area defined by the outer edge of the terminal; and, in the bonding layer forming step, the second bonding body is formed on the first bonding body after the first bonding body is cured.Type: ApplicationFiled: September 11, 2012Publication date: August 27, 2015Applicant: MEIKO ELECTRONICS CO., LTD.Inventors: Tohru Matsumoto, Masaru Ogasawara, Mitsuaki Toda
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Publication number: 20150245475Abstract: The present invention provides a component-embedded substrate (1) formed by dividing a laminate which is formed by bonding a component (12) onto a conductive material (10) placed on a support (8); sequentially laminating an insulation material (18, 28) and a core substrate (20) each having a component avoiding hole (32) which avoids the component; and hot-pressing the laminate to allow the melted insulation material to flow into the component avoiding hole to thereby form an integrated laminate (2, 36), wherein the component-embedded substrate includes regulation means (16, 34, 32, 38) which limits the displacement of the core substrate slipping on the insulation material melted during the hot pressing.Type: ApplicationFiled: September 10, 2012Publication date: August 27, 2015Applicant: MEIKO ELECTRONICS CO., LTD.Inventors: Tohru Matsumoto, Kentaro Aoki, Mitsuaki Toda
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Publication number: 20150237734Abstract: In a mark forming step in a manufacturing method for a component incorporated substrate in which an electronic component is positioned with reference to a mark formed in a copper layer, when an imaginary line extending from a search center of a search range of a sensor, to an edge side of the search range is represented as a search reference line and an imaginary line extending, in a state in which a mark center, is matched with the search center, from the mark center in the same direction as the search reference line to an outer ridgeline of the mark is represented as a mark reference line, the mark formed in a shape in which the outer ridgeline of the mark is present in a position where a length of the mark reference line is in a range of 30% or more of the search reference line.Type: ApplicationFiled: September 26, 2012Publication date: August 20, 2015Applicant: MEIKO ELECTRONICS CO., LTD.Inventors: Ryoichi Shimizu, Mitsuo Iwamoto, Mitsuaki Toda
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Publication number: 20150223343Abstract: A manufacturing method for a component incorporated substrate according to the present invention includes positioning an electronic component with reference to a mark formed on a copper layer, the mark consisting of a material less easily etched than copper by a copper etching agent used for etching of copper, after mounting the electronic component on the copper layer with an adhesive layer-interposed therebetween, embedding the electronic component and the mark in an insulating substrate, thereafter, etching and removing a part of the copper layer to form a window for exposing the mark, forming an LVH reaching a terminal of the electronic component with reference to the exposed mark, electrically connecting the terminal and the copper layer via a conduction via formed by applying copper plating to the LVH, and, thereafter, forming the copper layer into a wiring pattern.Type: ApplicationFiled: September 11, 2012Publication date: August 6, 2015Applicant: c/o Meiko Electronics Co., Ltd.Inventors: Akira Yamaki, Tatsuya Kikuchi, Mitsuaki Toda
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Patent number: 8921706Abstract: A component-embedded substrate includes an electrically insulating base (11) of resin, an electric or electronic embedded component (8) and a dummy embedded component (7) both embedded in the insulating base (11), a conductor pattern (18) formed on at least one side of the insulating base (11) and connected directly to or indirectly via a connection layer (6) to the embedded component (8) and the dummy embedded component (7), and a mark (10) formed on a surface of the dummy embedded component (7) and used as a reference when the conductor pattern (18) is formed, whereby positional accuracy of the conductor pattern (18) relative to the embedded component (8) can be improved.Type: GrantFiled: October 1, 2010Date of Patent: December 30, 2014Assignee: Meiko Electronics Co., Ltd.Inventors: Mitsuaki Toda, Yoshio Imamura, Takuya Hasegawa
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Publication number: 20140216801Abstract: A method of manufacturing a component-embedded substrate comprises forming an adhesive layer on a metal layer formed on a supporting plate, and mounting an electric or electronic component on the adhesive layer, wherein the component includes a component main body and a protrusion that protrudes beyond the component main body toward the adhesive layer, the adhesive layer includes a first adhesive body and a second adhesive body, the first adhesive body is formed only at a position corresponding to the protrusion, the second adhesive body is formed in an area corresponding to the whole of the surface of the component facing the adhesive layer after the first adhesive body is cured, and the component is mounted with the protrusion aligned with the first adhesive body in the component mounting step.Type: ApplicationFiled: September 12, 2011Publication date: August 7, 2014Applicant: MEIKO ELECTRONICS CO., LTD.Inventors: Tohru Matsumoto, MItsuaki Toda, Yoshio Imamura
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Publication number: 20130176701Abstract: A component-embedded substrate includes an electrically insulating base (11) of resin, an electric or electronic embedded component (8) and a dummy embedded component (7) both embedded in the insulating base (11), a conductor pattern (18) formed on at least one side of the insulating base (11) and connected directly to or indirectly via a connection layer (6) to the embedded component (8) and the dummy embedded component (7), and a mark (10) formed on a surface of the dummy embedded component (7) and used as a reference when the conductor pattern (18) is formed, whereby positional accuracy of the conductor pattern (18) relative to the embedded component (8) can be improved.Type: ApplicationFiled: October 1, 2010Publication date: July 11, 2013Applicant: Meiko Electronics Co., Ltd.Inventors: Mitsuaki Toda, Yoshio Imamura, Takuya Hasegawa