Patents by Inventor Mitsue Ueno

Mitsue Ueno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and a method of manufacturing the same
    Patent number: 6879037
    Abstract: A semiconductor device according to the invention is provided with square first semiconductor chip and second semiconductor chip laminated with each one main surface opposite, a supporting lead a part of which is arranged between one main surface of the first semiconductor chip and one main surface of the second semiconductor chip and a resin sealing body that seals the first semiconductor chip, the second semiconductor chip and the supporting lead and is characterized in that the respective one main surfaces of the first semiconductor chip and the second semiconductor chip are bonded to a part of the supporting lead via an adhesive layer and a part of the supporting lead is formed so that it has smaller width than the respective sides of the first semiconductor chip and the second semiconductor chip.
    Type: Grant
    Filed: August 27, 2003
    Date of Patent: April 12, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Takashi Wada, Takuji Ide, Eiji Niihara, Shunichiro Fujioka, Mitsue Ueno
  • Semiconductor device and a method of manufacturing the same
    Patent number: 6727114
    Abstract: A semiconductor device according to the invention is provided with square first semiconductor chip and second semiconductor chip laminated with each one main surface opposite, a supporting lead a part of which is arranged between one main surface of the first semiconductor chip and one main surface of the second semiconductor chip and a resin sealing body that seals the first semiconductor chip, the second semiconductor chip and the supporting lead and is characterized in that the respective one main surfaces of the first semiconductor chip and the second semiconductor chip are bonded to a part of the supporting lead via an adhesive layer and a part of the supporting lead is formed so that it has smaller width than the respective sides of the first semiconductor chip and the second semiconductor chip.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: April 27, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Wada, Takuji Ide, Eiji Niihara, Shunichiro Fujioka, Mitsue Ueno
  • Semiconductor device and a method of manufacturing the same
    Publication number: 20040056363
    Abstract: A semiconductor device according to the invention is provided with square first semiconductor chip and second semiconductor chip laminated with each one main surface opposite, a supporting lead a part of which is arranged between one main surface of the first semiconductor chip and one main surface of the second semiconductor chip and a resin sealing body that seals the first semiconductor chip, the second semiconductor chip and the supporting lead and is characterized in that the respective one main surfaces of the first semiconductor chip and the second semiconductor chip are bonded to a part of the supporting lead via an adhesive layer and a part of the supporting lead is formed so that it has smaller width than the respective sides of the first semiconductor chip and the second semiconductor chip.
    Type: Application
    Filed: August 27, 2003
    Publication date: March 25, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Takashi Wada, Takuji Ide, Eiji Niihara, Shunichiro Fujioka, Mitsue Ueno
  • Semiconductor device and a method of manufacturing the same
    Patent number: 6420783
    Abstract: A semiconductor device according to the invention is provided with square first semiconductor chip and second semiconductor chip laminated with each one main surface opposite, a supporting lead a part of which is arranged between one main surface of the first semiconductor chip and one main surface of the second semiconductor chip and a resin sealing body that seals the first semiconductor chip, the second semiconductor chip and the supporting lead and is characterized in that the respective one main surfaces of the first semiconductor chip and the second semiconductor chip are bonded to a part of the supporting lead via an adhesive layer and a part of the supporting lead is formed so that it has smaller width than the respective sides of the first semiconductor chip and the second semiconductor chip.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: July 16, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Wada, Takuji Ide, Eiji Niihara, Shunichiro Fujioka, Mitsue Ueno
  • Semiconductor device and a method of manufacturing the same
    Publication number: 20020027266
    Abstract: A semiconductor device according to the invention is provided with square first semiconductor chip and second semiconductor chip laminated with each one main surface opposite, a supporting lead a part of which is arranged between one main surface of the first semiconductor chip and one main surface of the second semiconductor chip and a resin sealing body that seals the first semiconductor chip, the second semiconductor chip and the supporting lead and is characterized in that the respective one main surfaces of the first semiconductor chip and the second semiconductor chip are bonded to a part of the supporting lead via an adhesive layer and a part of the supporting lead is formed so that it has smaller width than the respective sides of the first semiconductor chip and the second semiconductor chip.
    Type: Application
    Filed: March 20, 2001
    Publication date: March 7, 2002
    Inventors: Takashi Wada, Takuji Ide, Eiji Niihara, Shunichiro Fujioka, Mitsue Ueno
  • Semiconductor device and a method of manufacturing the same
    Publication number: 20010028107
    Abstract: A semiconductor device according to the invention is provided with square first semiconductor chip and second semiconductor chip laminated with each one main surface opposite, a supporting lead a part of which is arranged between one main surface of the first semiconductor chip and one main surface of the second semiconductor chip and a resin sealing body that seals the first semiconductor chip, the second semiconductor chip and the supporting lead and is characterized in that the respective one main surfaces of the first semiconductor chip and the second semiconductor chip are bonded to a part of the supporting lead via an adhesive layer and a part of the supporting lead is formed so that it has smaller width than the respective sides of the first semiconductor chip and the second semiconductor chip.
    Type: Application
    Filed: March 7, 2001
    Publication date: October 11, 2001
    Inventors: Takashi Wada, Takuji Ide, Eiji Niihara, Shunichiro Fujioka, Mitsue Ueno