Patents by Inventor Mitsuharu Hamano

Mitsuharu Hamano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120885
    Abstract: A Doherty amplification device includes a distributor to distribute, into first and second signals, an input signal after distortion-compensation, first and second amplifiers, a combiner to combine the amplified first and second signals, and an adjuster between the distributor and the first or second amplifiers and to include a first calculation circuit to obtain a first-characteristic indicating a relationship of a gain of an output signal with respect to reference-power of the input signal, based on the output signal and the input signal, a classification circuit to classify the first-characteristic into regions according to the reference-power, a second calculation circuit to obtain a statistical-value of the gain for each regions, and a determination circuit to set, in the adjuster, a phase-delay at which distortion to be generated in the output signal is minimized, based on the statistical-value, wherein the adjuster adjusts the phase-delay of the first or second signals.
    Type: Application
    Filed: July 12, 2023
    Publication date: April 11, 2024
    Applicant: Fujitsu Limited
    Inventors: Toshiyuki Aoki, Akihiko Komatsuzaki, Mitsuharu Hamano
  • Patent number: 10291273
    Abstract: There is provided a distortion cancellation device including a memory, and a processor coupled to the memory and the processor configured to, acquire a transmission signal to be wirelessly transmitted, acquire a reception signal to which an intermodulation signal generated due to the transmission signal wirelessly transmitted is added, generate a replica signal of the intermodulation signal from the transmission signal, detect an arrival time of the intermodulation signal, based on a correlation operation using a sample of a signal sequence of the replica signal and a sample of the acquired reception signal, the signal sequence having a duration corresponding to a detection range, and cancel the intermodulation signal in the reception signal, based on the detected arrival time.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: May 14, 2019
    Assignee: FUJITSU LIMITED
    Inventor: Mitsuharu Hamano
  • Patent number: 10171120
    Abstract: An apparatus for suppressing an intermodulation distortion component in a reception signal executes acquisition to acquire a plurality of transmission signals transmitted at frequencies different from each other, executes reception to receive a reception signal including an intermodulation distortion component caused by the plurality of transmission signals, executes generation to generate a replica of the intermodulation distortion component according to the plurality of transmission signals, executes normalization to normalize the reception signal so that the reception signal has certain amplitude, executes calculation to calculate a correlation value between the normalized reception signal and the replica, executes adjustment to adjust delay in the replica relative to the reception signal according to the correlation value, and executes combination to combine the replica for which the delay is adjusted with the reception signal.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: January 1, 2019
    Assignee: FUJITSU LIMITED
    Inventor: Mitsuharu Hamano
  • Publication number: 20180316370
    Abstract: There is provided a distortion cancellation device including a memory, and a processor coupled to the memory and the processor configured to, acquire a transmission signal to be wirelessly transmitted, acquire a reception signal to which an intermodulation signal generated due to the transmission signal wirelessly transmitted is added, generate a replica signal of the intermodulation signal from the transmission signal, detect an arrival time of the intermodulation signal, based on a correlation operation using a sample of a signal sequence of the replica signal and a sample of the acquired reception signal, the signal sequence having a duration corresponding to a detection range, and cancel the intermodulation signal in the reception signal, based on the detected arrival time.
    Type: Application
    Filed: February 20, 2018
    Publication date: November 1, 2018
    Applicant: FUJITSU LIMITED
    Inventor: Mitsuharu Hamano
  • Publication number: 20180254789
    Abstract: An apparatus for suppressing an intermodulation distortion component in a reception signal executes acquisition to acquire a plurality of transmission signals transmitted at frequencies different from each other, executes reception to receive a reception signal including an intermodulation distortion component caused by the plurality of transmission signals, executes generation to generate a replica of the intermodulation distortion component according to the plurality of transmission signals, executes normalization to normalize the reception signal so that the reception signal has certain amplitude, executes calculation to calculate a correlation value between the normalized reception signal and the replica, executes adjustment to adjust delay in the replica relative to the reception signal according to the correlation value, and executes combination to combine the replica for which the delay is adjusted with the reception signal.
    Type: Application
    Filed: January 2, 2018
    Publication date: September 6, 2018
    Applicant: FUJITSU LIMITED
    Inventor: Mitsuharu Hamano
  • Patent number: 9680511
    Abstract: A distortion compensator, includes: an input terminal configured to receive a transmission signal; a processor configured to perform operations to process the transmission signal, wherein the operations includes: compensating a nonlinear distortion of an amplifier which amplifies a power of the transmission signal, by using a distortion compensation coefficient corresponding to an amplitude value of the transmission signal; calculating a difference between a power value of the transmission signal and a power value of a feedback signal from the amplifier; calculating an imaginary part of a first complex vector based on an error between the transmission signal and the feedback signal in a cartesian coordinate system; and updating the distortion compensation coefficient by using a second complex vector of which a real part is the difference, and an imaginary part is the imaginary part of the first complex vector.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: June 13, 2017
    Assignee: FUJITSU LIMTIED
    Inventor: Mitsuharu Hamano
  • Patent number: 9473334
    Abstract: A wireless transmission device includes an amplifier that amplifies power of a wireless transmission signal, a table that stores a plurality of distortion compensation coefficients used for compensating non-linear distortion of the amplifier, and a control unit that alternately performs reading of one distortion compensation coefficient and writing of one distortion compensation coefficient adjusted based on a feedback signal from the amplifier, by using any one port of the table at the time of update of any distortion compensation coefficient out of the plurality of distortion compensation coefficients stored in the table.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: October 18, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Satoshi Matsubara, Mitsuharu Hamano
  • Patent number: 9337783
    Abstract: A distortion compensation apparatus includes: a storage unit that stores a distortion compensation coefficient; a distortion-compensation-coefficient selecting unit that takes a logarithm of power of an input signal and exponentiates a value obtained by taking the logarithm, and that selects a distortion compensation coefficient that is stored in the storage unit according to a value obtained by the exponentiating; a distortion-compensation processing unit that acquires the selected distortion compensation coefficient from the storage unit, and that performs distortion compensation processing on the input signal to the distortion-compensation-coefficient selecting unit using the acquired distortion compensation coefficient; an amplifier that amplifies the signal subjected to the distortion compensation processing; and a distortion-compensation-coefficient updating unit that updates the distortion compensation coefficient stored in the storage unit based on the amplified signal and the input signal to the dist
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: May 10, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Satoshi Matsubara, Mitsuharu Hamano, Hideharu Shako
  • Patent number: 9203447
    Abstract: In a distortion compensating unit, a threshold calculating unit calculates a clip threshold to be set in an adjusting unit based on an address value generated by an address generating circuit. For example, the threshold calculating unit calculates the clip threshold by identifying the maximum value of address values generated by the address generating circuit in each adjustment unit period and subtracting a certain offset value from the identified maximum value. The adjusting unit adjusts a distortion compensation coefficient based on an address value received from the address generating circuit and a magnitude relationship with the set clip threshold.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: December 1, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Satoshi Matsubara, Hideharu Shako, Mitsuharu Hamano
  • Patent number: 9203449
    Abstract: A delay quantity estimation apparatus comprises a first correlation value arithmetic unit to calculate a first correlation value as a correlation value between a first input signal and a feedback signal delayed with a first delay value; a second correlation value arithmetic unit to calculate a second correlation value as a correlation value between the first input signal and a feedback signal delayed with a second delay value; and a delay quantity estimation unit to estimate a delay quantity of the feedback signal with respect to the input signal on the basis of the first difference value as a difference between the first correlation value and the second correlation value, wherein the second delay value is a value given by adding a certain value to the first delay value.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: December 1, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Satoshi Matsubara, Hideharu Shako, Mitsuharu Hamano, Kazuo Nagatani
  • Patent number: 9172333
    Abstract: A distortion compensation device includes a storage unit, an address generator, and a distortion compensation processor. The storage unit stores therein a distortion compensation coefficient for compensating distortion generated in an amplifier for amplifying an input signal. The address generator generates a first address based on a power value of the signal at a current time. Furthermore, the address generator delays, every time a new augend is input, the sum of the power value of the signal at the current time and the augend. The address generator generates a second address based on the sum obtained by calculating a new augend, from the delayed sum. The distortion compensation processor acquires a distortion compensation coefficient corresponding to a combination of the first address and the second address from the storage unit and performs distortion compensation processing on the signal by using the acquired distortion compensation coefficient.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: October 27, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Satoshi Matsubara, Mitsuharu Hamano, Hideharu Shako
  • Publication number: 20150280947
    Abstract: A wireless transmission device includes an amplifier that amplifies power of a wireless transmission signal, a table that stores a plurality of distortion compensation coefficients used for compensating non-linear distortion of the amplifier, and a control unit that alternately performs reading of one distortion compensation coefficient and writing of one distortion compensation coefficient adjusted based on a feedback signal from the amplifier, by using any one port of the table at the time of update of any distortion compensation coefficient out of the plurality of distortion compensation coefficients stored in the table.
    Type: Application
    Filed: February 23, 2015
    Publication date: October 1, 2015
    Inventors: Satoshi MATSUBARA, Mitsuharu HAMANO
  • Publication number: 20150077180
    Abstract: A distortion compensation apparatus includes: a storage unit that stores a distortion compensation coefficient; a distortion-compensation-coefficient selecting unit that takes a logarithm of power of an input signal and exponentiates a value obtained by taking the logarithm, and that selects a distortion compensation coefficient that is stored in the storage unit according to a value obtained by the exponentiating; a distortion-compensation processing unit that acquires the selected distortion compensation coefficient from the storage unit, and that performs distortion compensation processing on the input signal to the distortion-compensation-coefficient selecting unit using the acquired distortion compensation coefficient; an amplifier that amplifies the signal subjected to the distortion compensation processing; and a distortion-compensation-coefficient updating unit that updates the distortion compensation coefficient stored in the storage unit based on the amplified signal and the input signal to the dist
    Type: Application
    Filed: November 24, 2014
    Publication date: March 19, 2015
    Inventors: Satoshi Matsubara, Mitsuharu Hamano, Hideharu Shako
  • Publication number: 20150003563
    Abstract: A distortion compensation apparatus for compensating distortion of an input signal by an amplifier, the apparatus including: a storage unit configured to store a distortion compensation coefficient; a distortion compensation processing unit configured to read the distortion compensation coefficient from the storage unit based on a plurality of first addresses each corresponding to power of the input signal and perform distortion compensation on the input signal; and a distortion compensation coefficient copy unit configured to store the distortion compensation coefficient stored at a third address to a second address in which no distortion compensation coefficient is stored, between a maximum address and a minimum address of the storage unit storing the distortion compensation coefficients out of plurality of first addresses.
    Type: Application
    Filed: May 15, 2014
    Publication date: January 1, 2015
    Applicant: FUJITSU LIMITED
    Inventors: Satoshi MATSUBARA, HIDEHARU SHAKO, Mitsuharu HAMANO
  • Publication number: 20140145788
    Abstract: A distortion compensation device includes a storage unit, an address generator, and a distortion compensation processor. The storage unit stores therein a distortion compensation coefficient for compensating distortion generated in an amplifier for amplifying an input signal. The address generator generates a first address based on a power value of the signal at a current time. Furthermore, the address generator delays, every time a new augend is input, the sum of the power value of the signal at the current time and the augend. The address generator generates a second address based on the sum obtained by calculating a new augend, from the delayed sum. The distortion compensation processor acquires a distortion compensation coefficient corresponding to a combination of the first address and the second address from the storage unit and performs distortion compensation processing on the signal by using the acquired distortion compensation coefficient.
    Type: Application
    Filed: August 26, 2013
    Publication date: May 29, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Satoshi MATSUBARA, Mitsuharu HAMANO, Hideharu SHAKO
  • Publication number: 20140146910
    Abstract: A delay quantity estimation apparatus comprises a first correlation value arithmetic unit to calculate a first correlation value as a correlation value between a first input signal and a feedback signal delayed with a first delay value; a second correlation value arithmetic unit to calculate a second correlation value as a correlation value between the first input signal and a feedback signal delayed with a second delay value; and a delay quantity estimation unit to estimate a delay quantity of the feedback signal with respect to the input signal on the basis of the first difference value as a difference between the first correlation value and the second correlation value, wherein the second delay value is a value given by adding a certain value to the first delay value.
    Type: Application
    Filed: September 27, 2013
    Publication date: May 29, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Satoshi MATSUBARA, HIDEHARU SHAKO, Mitsuharu HAMANO, Kazuo NAGATANI
  • Publication number: 20140003554
    Abstract: In a distortion compensating unit, a threshold calculating unit calculates a clip threshold to be set in an adjusting unit based on an address value generated by an address generating circuit. For example, the threshold calculating unit calculates the clip threshold by identifying the maximum value of address values generated by the address generating circuit in each adjustment unit period and subtracting a certain offset value from the identified maximum value. The adjusting unit adjusts a distortion compensation coefficient based on an address value received from the address generating circuit and a magnitude relationship with the set clip threshold.
    Type: Application
    Filed: May 15, 2013
    Publication date: January 2, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Satoshi MATSUBARA, Hideharu SHAKO, Mitsuharu HAMANO
  • Patent number: 8385859
    Abstract: An electronic apparatus having communications capabilities, including: an envelope detector that detects an envelope of a transmission signal; a differentiator that differentiates the envelope with respect to time to obtain differential components; a filtering processor that filters the differential components; an integrator that integrates the filtered differential components with respect to time to generate an envelope tracking signal; an amplifying unit that amplifies the transmission signal; and a voltage controller that controls, in accordance with the envelope tracking signal, a voltage the amplifying unit uses to amplify the transmission signal.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: February 26, 2013
    Assignee: Fujitsu Limited
    Inventor: Mitsuharu Hamano
  • Publication number: 20110223875
    Abstract: An electronic apparatus having communications capabilities, including: an envelope detector that detects an envelope of a transmission signal; a differentiator that differentiates the envelope with respect to time to obtain differential components; a filtering processor that filters the differential components; an integrator that integrates the filtered differential components with respect to time to generate an envelope tracking signal; an amplifying unit that amplifies the transmission signal; and a voltage controller that controls, in accordance with the envelope tracking signal, a voltage the amplifying unit uses to amplify the transmission signal.
    Type: Application
    Filed: March 4, 2011
    Publication date: September 15, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Mitsuharu Hamano
  • Patent number: 7973601
    Abstract: An apparatus for compensating a distortion characteristic of an amplifier includes an update unit configured to store a distortion compensation coefficient, configured to calculate the coefficient based on a signal before input to the amplifier and a feedback signal, and configured to update the stored coefficient to the calculated coefficient; a distortion compensation unit configured to perform distortion compensation processing of the signal before input to the amplifier by using the updated coefficient; a delay unit configured to delay the signal before input to the amplifier by a set delay time, to output the delayed signal to the distortion compensation coefficient update unit; and a delay controller configured to control the set delay time based on a phase of a complex number having a power component of the signal before input to the amplifier as a real part, and a power component of the feedback signal as an imaginary part.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: July 5, 2011
    Assignee: Fujitsu Limited
    Inventor: Mitsuharu Hamano