Abstract: A digital signal processor for recording an analog signal in the form of a PCM signal and/or for reproducing the PCM signal in the form of an analog signal. It has functions of generating a first and a second check code each by performing a modulo 2 operation and of adding a third check code to each of the first and the second check codes for detecting errors. The original signals can thereby be restored completely, even when up to two data sets have been subjected to errors.

Abstract: A synchronizing signal detecting circuit for synchronizing digital data receiving equipment is disclosed. Digital signals consisting of data and synchronizing signals obtained by repeating a predetermined pulse pattern many times are fed to a shift register in succession in synchronism with clock pulses. A gate circuit connected to the shift register detects the synchronization pulse pattern. A detector circuit detects a duration period of a coincidence signal which is the output of the gate circuit, and outputs a synchronous detection signal when the duration period of the coincidence signal exceeds the predetermined value. This synchronizing signal detecting circuit can detect synchronizing signals even when data errors are produced to some extent.

Abstract: An error correcting device which is useful for digital data transmission, e.g.--in PCM (pulse coded modulation) type tape recorders. The positions of erroneous data are ascertained by an error detecting method such as the CRCC (cyclic redundancy check code) method. The error correction is performed using two kinds of check codes, P and Q. Check code P is obtained by a modulo 2 operation on each bit of a plurality of data. Check code Q is obtained by a modulo 2 operation on each bit of data which is successively shifted by adding extra bits having a predetermined polarity to the individual data units.By means of above-rated error detection method and the two check codes, the present invention provides an error correcting device which is capable of correcting up to two erroneous data units. The error correcting circuit is constructed simply, and error correcting performance is increased.

Abstract: A digital audio signal recorder for obtaining coded signals having a first check code generator for generating the sum of module 2 for each bit of pieces of predetermined sampled data; and further has a circuit operatively coupled to said generator for arranging the sampled data, a first check code and a second check code at positions spaced on a time axis from each other. This invention also provides a method of generating such a digital audio signal. This invention is advantageous because it makes possible a low rate of redundancy and a simple decode circuit.

Abstract: A d.c. gas-discharge display device has gas-discharge display panel including hot cathodes inserted in a thermal electron generating space, an insulating plate having holes as discharge-glow spaces and on one surface thereof grid electrodes with holes for penetration of thermal electrons and on another surface thereof anode electrodes, and gas, metallic vapor on a mixture thereof, which fills the space in the display panel and forms an envelope. A voltage generator supplies the cathodes with a potential to provide thermal electrons. A first pulse generator supplies the grid electrodes with a pulse having a pulse height higher than V.sub.ON and being biased by a d.c. voltage lower than V.sub.OFF.A second pulse generator supplies the anode electrodes with a positive pulse having a pulse height higher than the ionization voltage of the gas, metallic vapor or mixture and being biased by a d.c. voltage between ground level and the ionization voltage.