Patents by Inventor Mitsuhiro Funatsu

Mitsuhiro Funatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5382899
    Abstract: First absolute position detecting section generates an A.C. output signal having a phase electrically shifted in accordance with a position of a moving object, and samples a counted value of a counter circuit in response to an electrical phase change at a zero cross time point of the A.C. output signal, so as to output the sampled counted value of the counter circuit as absolute position data of the moving object. Second absolute position detecting section generates one or more delayed clock signals that are delayed from a clock signal on the basis of which the counter circuit counts up by an amount of time smaller than one period of the clock signal, and utilizes the one or more delayed clock signals to measure the zero cross time point of the A.C. output signal in accordance with a unit time smaller than the one period of the clock signal, so as to output, as the absolute position data, the measured time point after having been added to the sampled counted value.
    Type: Grant
    Filed: November 19, 1992
    Date of Patent: January 17, 1995
    Assignee: Kabushiki Kaisha SG
    Inventors: Mitsuhiro Funatsu, Kazuya Sakamoto
  • Patent number: 5142226
    Abstract: An absolute position detector samples and outputs a digital value of absolute position data of an object of detection at each predetermined sampling timing. An interpolation circuit interpolates between position data of different sampling timings provided by the absolute position detector, thereby to produce absolute position data at close intervals. Such arrangement produces absolute position data with a time resolution which is finer than the period of the sampling timing. A further circuit produces an incremental pulse train on the basis of the output of the interpolation circuit in correspondence to change in a value of interpolation for each interpolation step.
    Type: Grant
    Filed: September 1, 1989
    Date of Patent: August 25, 1992
    Assignee: Kabushiki Kaisha SG
    Inventors: Kazuya Sakamoto, Mitsuhiro Funatsu