Abstract: A package substrate on which a semiconductor chip in which circuit elements having different operating voltages exist in a mixed manner is mounted on a front surface side thereof, and in which electrical paths extending from the front surface side to a back surface side are formed for each of the operating voltages. IN the package substrate, the wiring layers having the different operating voltages are arranged so as to be spaced apart by predetermined distances in accordance with the operating voltages, and the wiring layers having the same operating voltage are arranged so as to overlap with each other in a plan view at least in the build-up layer.

Abstract: A semiconductor element is mounted on a die pad, and electrode pads arranged at an outer circumference of a surface of the semiconductor element are electrically connected to leads by wires, respectively. The semiconductor element, the die pad, and the leads are covered with an encapsulating resin. The semiconductor element has an element region having a high sensitivity with respect to stress, and an element region having a relatively low sensitivity with respect to stress. A recessed portion is formed in a surface of the encapsulating resin at a position above the element region having a high sensitivity with respect to stress.

Abstract: A semiconductor element is mounted on a die pad, and electrode pads arranged at an outer circumference of a surface of the semiconductor element are electrically connected to leads by wires, respectively. The semiconductor element, the die pad, and the leads are covered with an encapsulating resin. The semiconductor element has an element region having a high sensitivity with respect to stress, and an element region having a relatively low sensitivity with respect to stress. A recessed portion is formed in a surface of the encapsulating resin at a position above the element region having a high sensitivity with respect to stress.