Abstract: To provide a thin film capacitor having a pair of terminal electrodes capable of being disposed on the same plane. A thin film capacitor includes a metal foil having a roughened surface, a dielectric film covering the roughened surface of the metal foil and having an opening partially exposing the metal foil therethrough, an electrode layer contacting the metal foil through the opening, and an electrode layer contacting the dielectric film without contacting the metal foil. An upper surface position of the electrode layer is equal to or lower in height than that of the electrode layer.

Abstract: An electronic component embedded module may include a hole diameter defining layer, an electronic component, and an insulation layer. The hole diameter defining layer may include an inner wall, an outer wall, a front surface intersecting with the inner wall and the outer wall, and a rear surface. The electronic component may include a first terminal surface facing the rear surface of the hole diameter defining layer, and a first terminal electrode on the first terminal surface. The insulation layer is between the first terminal surface and the rear surface, covers the outer wall, and includes a step with respect to the front surface around the front surface. A connection hole may extend from the inner wall of the hole diameter defining layer to the first terminal electrode through the insulation layer.

Abstract: To provide a thin film capacitor having a pair of terminal electrodes capable of being disposed on the same plane. A thin film capacitor 1 includes a metal foil having a non-roughened center portion and a roughened upper surface, a dielectric film covering the roughened upper surface of the metal foil, an electrode layer contacting the non-roughened center portion of the metal foil through an opening formed in the dielectric film, and an electrode layer contacting the dielectric film without contacting the metal foil. A thickness of the center portion of the metal foil at a position overlapping the electrode layer is larger than a thickness thereof at a position overlapping the electrode layer.

Abstract: Disclosed herein is an electronic component that includes: a substrate; a capacitor on the substrate; a first insulating resin layer embedding therein the capacitor; an inductor provided on the first insulating resin layer and connected to the capacitor, the inductor including a conductor pattern; a second insulating resin layer embedding therein the inductor; a third insulating resin layer on the second insulating resin layer; a post conductor having a lower end and an upper end and penetrating the third insulating resin layer such that the lower end of the post conductor is connected to the inductor; and a terminal electrode on the third insulating resin layer and connected to the upper end of the post conductor. In a thickness direction of the substrate, the height of the post conductor is larger than a thickness of a conductor pattern constituting the inductor.

Abstract: An electronic component includes conductor layers and insulating resin layers which are alternately stacked on a substrate. One of the insulating resin layers positioned in the lowermost layer is smaller in thickness than the insulating resin layers, and the insulating resin layers are smaller in thermal expansion coefficient than the one of the insulating resin layers. Thus, an element that requires high processing accuracy, such as a capacitor, can be embedded in the insulating resin layer positioned in the lowermost layer and having a small thickness, and an element that requires a sufficient conductor thickness, such as an inductor, can be embedded in the insulating resin layers having a large thickness. In addition, since the insulating resin layers each have a small thermal expansion coefficient, the occurrence of warpage and peeling can be suppressed.

Abstract: Disclosed herein is an electronic component that includes an element body having a structure in which a plurality of conductor layers are stacked in a first direction on a surface of a substrate with insulating layers interposed therebetween, and a plurality of terminal electrodes provided on a mounting surface of the element body. The mounting surface extends in the first direction and in a second direction perpendicular to the first direction. The element body includes an inductor constituted by the plurality of conductor layers and has a coil axis extending in a third direction perpendicular to both the first and second directions.

Abstract: Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The lower electrode layer includes a first metal layer positioned on a side facing the dielectric layer and a second metal layer positioned on a side facing away from the dielectric layer. The first metal layer has a first surface positioned on a side facing the second metal layer and a second surface positioned on a side facing the dielectric layer. The first surface has a surface roughness higher than that of the second surface. The second metal layer reflects a surface property of the first surface.

Abstract: A first insulating layer, a conductor layer included on a first main surface, an electronic component included on the first main surface and a second insulating layer stacked on the first insulating layer are included, a stacking direction of the first insulating layer and the second insulating layer is the same as a stacking direction of a first electrode layer, a second electrode layer, and the dielectric layer in the electronic component, and a height position of a main surface of the electronic component on an opposite side from a side of the first main surface is different from a height position of a main surface of the conductor layer adjacent to the electronic component on an opposite side from a side of the first main surface in the stacking direction.

Abstract: In an electric component embedded structure, a first electrode terminal provided on a first main surface includes an intra-area terminal, and the intra-area terminal is electrically connected to an overlap portion of an overlap wiring in a formation area of an electric component. Accordingly, a decrease in mounting area of the electric component embedded structure is achieved. The intra-area terminal can be electrically connected to a second electrode terminal provided on a second main surface via a first via-conductor, the overlap wiring, and a second via-conductor. The intra-area terminal is connected to a wiring (an overlap wiring) of a first insulating layer without additionally providing a rewiring layer causing an increase in thickness, and the increase in thickness is curbed, whereby a decrease in size of the electric component embedded structure is achieved.

Abstract: A thin-film capacitor includes an insulating base member, and a capacitance portion that is laminated on the insulating base member has a plurality of internal electrode layers which are laminated on the insulating base member and are provided in a lamination direction and dielectric layers which are sandwiched between the internal electrode layers. A relative dielectric constant of the dielectric layers is 100 or higher.

Abstract: In a thin-film capacitor, an electrode terminal layer and an electrode layer of a capacitor portion are connected to electrode terminals by via conductors that is formed to penetrate an insulating layer in a thickness direction thereof, and a short circuit wiring in the thickness direction is realized by the via conductors. In the thin-film capacitor, an increase in the number of terminals in the plurality of electrode terminals is achieved, a decrease in length of a circuit wiring is achieved, and thus a thin-film capacitor with low-ESL has been achieved.

Abstract: Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The lower electrode layer includes a first metal layer positioned on a side facing the dielectric layer and a second metal layer positioned on a side facing away from the dielectric layer. The first metal layer has a first surface positioned on a side facing the second metal layer and a second surface positioned on a side facing the dielectric layer. The first surface has a surface roughness higher than that of the second surface. The second metal layer reflects a surface property of the first surface.

Abstract: A thin-film capacitor satisfies a relationship of CTE1>CTE2>CTE3 regarding a linear expansion coefficient CTE1 of a base, a linear expansion coefficient CTE2 of a capacitance unit, and a linear expansion coefficient CTE3 of a barrier layer. The inventors have newly found that in a case in which such a relationship is satisfied, when a temperature falls from a deposition temperature, cracking occurring in the capacitance unit of the thin-film capacitor is prevented, and cracking occurring in the barrier layer is also prevented.

Abstract: In an electric component embedded structure, a first electrode terminal provided on a first main surface includes an intra-area terminal, and the intra-area terminal is electrically connected to an overlap portion of an overlap wiring in a formation area of an electric component. Accordingly, a decrease in mounting area of the electric component embedded structure is achieved. The intra-area terminal can be electrically connected to a second electrode terminal provided on a second main surface via a first via-conductor, the overlap wiring, and a second via-conductor. The intra-area terminal is connected to a wiring (an overlap wiring) of a first insulating layer without additionally providing a rewiring layer causing an increase in thickness, and the increase in thickness is curbed, whereby a decrease in size of the electric component embedded structure is achieved.

Abstract: An electronic component mounting package includes a semiconductor element which is disposed such that an active surface faces a main surface of a wiring portion, and which is electrically connected to the wiring portion via a first terminal; and a thin film passive element which is disposed between the active surface of the semiconductor element and the main surface of the wiring portion when seen in a lamination direction, and which is electrically connected to the semiconductor element. A part of the first terminal is disposed on an outer side with respect to the thin film passive element in a plan view. A length of the first terminal in the lamination direction disposed on the outer side with respect to the thin film passive element is larger than a thickness of the thin film passive element in the lamination direction.

Abstract: An electronic component embedded substrate includes: a substrate that includes an insulating layer and has a first principal surface and a second principal surface; an electronic component that is embedded in the substrate and has at least one first terminal, at least one second terminal, and a capacity part; at least one via conductor that are formed in the insulating layer and electrically connected to the second terminal; and an adhesion layer that is in contact with the second terminal on an end face of the second terminal which are close to the second principal surface. The electronic component is laminated with the insulating layer, and adhesion strength between the adhesion layer and the insulating layer is higher than that between the second terminal and the insulating layer.

Abstract: A thin-film capacitor includes an insulating base member, and a capacitance portion that is laminated on the insulating base member has a plurality of internal electrode layers which are laminated on the insulating base member and are provided in a lamination direction and dielectric layers which are sandwiched between the internal electrode layers. A relative dielectric constant of the dielectric layers is 100 or higher.

Abstract: A first insulating layer, a conductor layer included on a first main surface, an electronic component included on the first main surface and a second insulating layer stacked on the first insulating layer are included, a stacking direction of the first insulating layer and the second insulating layer is the same as a stacking direction of a first electrode layer, a second electrode layer, and the dielectric layer in the electronic component, and a height position of a main surface of the electronic component on an opposite side from a side of the first main surface is different from a height position of a main surface of the conductor layer adjacent to the electronic component on an opposite side from a side of the first main surface in the stacking direction.

Abstract: In a thin-film capacitor, an electrode terminal layer and an electrode layer of a capacitor portion are connected to electrode terminals by via conductors that is formed to penetrate an insulating layer in a thickness direction thereof, and a short circuit wiring in the thickness direction is realized by the via conductors. In the thin-film capacitor, an increase in the number of terminals in the plurality of electrode terminals is achieved, a decrease in length of a circuit wiring is achieved, and thus a thin-film capacitor with low-ESL has been achieved.

Abstract: Disclosed herein is an electronic component housing package that includes a carrier tape having a through hole for housing an electronic component, a base film stuck to the carrier tape and having a lower degree of rigidity than the carrier tape, and a release layer formed on a predetermined area of the base film so as to be exposed to the through hole of the carrier tape.