Abstract: A driving circuit for an image display apparatus wherein the respective rows and columns of the active matrix panel with a plurality of picture elements disposed on the matrix shape are respectively selected by the clock pulses of the given frequency to drive each of the picture elements. A counter which counts the clock pulses to introduce the binary count values and the inversion outputs, and a decoder which decodes the counter outputs to generate the pulses that sequentially shift in synchronous relation in the clock pulses are provided to feed the counter output from both the ends of the code signal line of the decoder so that the decoder may be always operated normally.