Patents by Inventor Mitsuhisa Hiromi

Mitsuhisa Hiromi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6392252
    Abstract: To provide a semiconductor device in which a direction of a conformation difference in respective wiring layers of semiconductor integrated circuits can be detected and at the same time a conformation difference detection sensitivity is increased. A semiconductor device is provided with semiconductor integrated circuits 10, which are practical circuits, and conformation difference detection circuits 11 in one and same semiconductor substrate.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: May 21, 2002
    Assignee: NEC Corporation
    Inventor: Mitsuhisa Hiromi
  • Publication number: 20010032978
    Abstract: To provide a semiconductor device in which a direction of a conformation difference in respective wiring layers of semiconductor integrated circuits can be detected and at the same time a conformation difference detection sensitivity is increased. A semiconductor device is provided with semiconductor integrated circuits 10, which are practical circuits, and conformation difference detection circuits 11 in one and same semiconductor substrate.
    Type: Application
    Filed: April 23, 2001
    Publication date: October 25, 2001
    Applicant: NEC Corporation
    Inventor: Mitsuhisa Hiromi
  • Patent number: 5870043
    Abstract: In a PLA DAC circuit, it renders output of output-characteristic independent of method of establishment of PLA possible. Test terminal TEST is added to input terminal IN, causing combination of normal digital signal and test signal to judge at logical operation circuit. Switching circuit functioning during test is provided between PLA 2 and constant current source circuit, thus controlling the switching circuit by the logical operation circuit. Under the normal condition, it causes PLA 2 to function as ROM of the DAC circuit, while under the test condition, it causes the PLA 2 to perform through by operation of the switch circuit so that output of each of current sources I1-I3 is capable of being controlled independently regardless of any establishment of PLA 2.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: February 9, 1999
    Assignee: NEC Corporation
    Inventor: Mitsuhisa Hiromi
  • Patent number: 5680268
    Abstract: A magnetic head drive circuit connected to a magnetic recording/playback head is supplied with an unbalanced write current. The drive circuit includes a recording/playback coil divided by a center tap into a first coil and a second coil. A high level of a value lower than the high level of a control signal of an input terminal IN3 is impressed to one of a control signal of input terminals IN1 and IN2 and a low level is impressed to the other so that a direction is determined of a write current supplied to the recording/playback coil from a current source composed of a current mirror made up from NPN bipolar transistors and resistors. The balanced/unbalanced switching of the supplied write current is performed by switching the voltage level impressed to control signal input terminal IN3 using an NPN bipolar transistor as a switching unit.
    Type: Grant
    Filed: March 21, 1996
    Date of Patent: October 21, 1997
    Assignee: NEC Corporation
    Inventor: Mitsuhisa Hiromi