Abstract: A route display method includes obtaining, by a processor, specification information that specifies one of interfaces from interfaces of an L2 apparatus that relays communication according to a protocol used in a datalink layer, among a plurality of apparatuses included in a virtual network displayed on a display apparatus, identifying, by the processor, an L3 apparatus that relays communication according to a protocol used in a network layer and belongs to a same network as the interface of the L2 apparatus, according to the specification information, and making, by the processor, a route that connects between the L2 apparatus and the L3 apparatus displayed on the display apparatus.

Abstract: A route display method includes obtaining, by a processor, specification information that specifies one of interfaces from interfaces of an L2 apparatus that relays communication according to a protocol used in a datalink layer, among a plurality of apparatuses included in a virtual network displayed on a display apparatus, identifying, by the processor, an L3 apparatus that relays communication according to a protocol used in a network layer and belongs to a same network as the interface of the L2 apparatus, according to the specification information, and making, by the processor, a route that connects between the L2 apparatus and the L3 apparatus displayed on the display apparatus.

Abstract: After a display displays a first symbol that represents a first device from among a plurality of devices in a communication network, a processor receives an instruction to display a specific port group from among a plurality of port groups that the first device includes. Then, the display displays a second symbol that represents a first port which is included in the specific port group in a position adjacent to the first symbol, and displays a line segment that indicates a connection relationship between the first port and a second device.

Abstract: An apparatus controls congestion in a communication network. The apparatus includes a plurality of ports configured to transmit and receive frames. The apparatus stores a traffic volume of each of the plurality of ports. The apparatus detects congestion in the communication network, based on frames that are received via the plurality of ports. Then, the apparatus determines one or more ports that receive frames causing the detected congestion, based on the traffic volumes of the plurality of ports.

Abstract: A switching apparatus having a plurality of ports, includes: switch information storage to store an output port identifier for a combination of an input port identifier, an input virtual path identifier, and a destination address; a detector to detect a first input virtual path identifier and a first destination address assigned to an input packet; a searcher to search the switch information storage for a first output port identifier based on a first input port identifier that identifies a port to which the input packet has been input, the first input virtual path identifier, and the first destination address; and a packet switch to transfer the input packet to a port identified by the first output port identifier.

Abstract: A frame concatenation apparatus includes a storage unit to store a plurality of frames to be transmitted, a generation unit to generate a concatenated frame including the plurality of frames read out from the storage unit and serially concatenated, and including frame length information on each frame attached thereto, and an attachment unit to attach information for establishing synchronization with a receiver of the concatenated frame, to the concatenated frame.

Abstract: A communication system includes a first communication apparatus including one or more first processors that determine a first bandwidth variance for each flow, based on a requested bandwidth variance amount and a surplus bandwidth of a physical line, and a first transmitter that transmits the first bandwidth variance to an adjacent apparatus; and a second communication apparatus including one or more second processors that set the received first bandwidth variance as a requested bandwidth variance amount for the second communication apparatus and determine a second bandwidth variance for each flow from the first bandwidth variance and the surplus bandwidth, and a second transmitter that transmits the second bandwidth variance to an adjacent apparatus.

Abstract: There is provided a node device having a plurality of transmission lines, included in a network, the node device including a first clock extracting section configured to extract a clock from a first packet used for synchronization of a clock in the node device, the first packet being received from the network through the transmission line, a second clock extracting section configured to extract a clock from a signal received from the network through the transmission line, and a clock selector to select a clock out of the clock extracted by the first clock extracting section and the clock extracted by the second clock extracting section, wherein the clock selected by the clock selector is used for synchronization of a clock in the node device.

Abstract: An apparatus controls congestion in a communication network. The apparatus includes a plurality of ports configured to transmit and receive frames. The apparatus stores a traffic volume of each of the plurality of ports. The apparatus detects congestion in the communication network, based on frames that are received via the plurality of ports. Then, the apparatus determines one or more ports that receive frames causing the detected congestion, based on the traffic volumes of the plurality of ports.

Abstract: A communication system includes a first communication apparatus including one or more first processors that determine a first bandwidth variance for each flow, based on a requested bandwidth variance amount and a surplus bandwidth of a physical line, and a first transmitter that transmits the first bandwidth variance to an adjacent apparatus; and a second communication apparatus including one or more second processors that set the received first bandwidth variance as a requested bandwidth variance amount for the second communication apparatus and determine a second bandwidth variance for each flow from the first bandwidth variance and the surplus bandwidth, and a second transmitter that transmits the second bandwidth variance to an adjacent apparatus.

Abstract: A switching apparatus having a plurality of ports, includes: switch information storage to store an output port identifier for a combination of an input port identifier, an input virtual path identifier, and a destination address; a detector to detect a first input virtual path identifier and a first destination address assigned to an input packet; a searcher to search the switch information storage for a first output port identifier based on a first input port identifier that identifies a port to which the input packet has been input, the first input virtual path identifier, and the first destination address; and a packet switch to transfer the input packet to a port identified by the first output port identifier.

Abstract: There is provided a node device having a plurality of transmission lines, included in a network, the node device including a first clock extracting section configured to extract a clock from a first packet used for synchronization of a clock in the node device, the first packet being received from the network through the transmission line, a second clock extracting section configured to extract a clock from a signal received from the network through the transmission line, and a clock selector to select a clock out of the clock extracted by the first clock extracting section and the clock extracted by the second clock extracting section, wherein the clock selected by the clock selector is used for synchronization of a clock in the node device.

Abstract: A read address from a memory and a write address to the memory are transmitted from a VT pointer circuit on an active side to a VT pointer circuit on a standby side in order to eliminate a difference between pointer values of the VT pointer circuits on the active and the standby sides, which is caused by a difference between the phases of the read address from the memory and the write address to the memory of the VT pointer circuits on the active and the standby sides, and the read and the write addresses on the standby side are overwritten with the transmitted address values. As a result, the address values can be made to match both on the active and the standby sides, and also the pointer values can be made to match.

Abstract: A read address from a memory and a write address to the memory are transmitted from a VT pointer circuit on an active side to a VT pointer circuit on a standby side in order to eliminate a difference between pointer values of the VT pointer circuits on the active and the standby sides, which is caused by a difference between the phases of the read address from the memory and the write address to the memory of the VT pointer circuits on the active and the standby sides, and the read and the write addresses on the standby side are overwritten with the transmitted address values. As a result, the address values can be made to match both on the active and the standby sides, and also the pointer values can be made to match.