Patents by Inventor Mitsunada Osawa

Mitsunada Osawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6881611
    Abstract: A method includes a resin sealing step of placing, in a cavity 28 of a mold 20, a substrate 16 to which semiconductor elements 11 on which bumps 12 are arranged, a resin sealing step of supplying resin 35 to positions of the bumps 12 so that a resin layer 13 sealing the bumps 12 is formed, a protruding electrode exposing step of exposing at least ends of the bumps 12 sealed by the resin layer 13 so that ends of the bumps 12 are exposed from the resin layer 13, and a separating step of cutting the substrate 16 together with the resin layer 13 so that the semiconductor elements 11 are separated from each other.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: April 19, 2005
    Assignee: Fujitsu Limited
    Inventors: Norio Fukasawa, Toshimi Kawahara, Muneharu Morioka, Mitsunada Osawa, Yasuhiro Shinma, Hirohisa Matsuki, Masanori Onodera, Junichi Kasai, Shigeyuki Maruyama, Masao Sakuma, Yoshimi Suzuki, Masashi Takenaka
  • Patent number: 6696754
    Abstract: A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: February 24, 2004
    Assignee: Fujitsu Limited
    Inventors: Mitsutaka Sato, Tetsuya Fujisawa, Shigeyuki Maruyama, Junichi Kasai, Toshimi Kawahara, Toshio Hamano, Yoshihiro Kubota, Mitsunada Osawa, Yoshiyuki Yoneda, Kazuto Tsuji, Hirohisa Matsuki
  • Publication number: 20030164544
    Abstract: A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
    Type: Application
    Filed: August 8, 2002
    Publication date: September 4, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Mitsutaka Sato, Tetsuya Fujisawa, Shigeyuki Maruyama, Junichi Kasai, Toshimi Kawahara, Toshio Hamano, Yoshihiro Kubota, Mitsunada Osawa, Yoshiyuki Yoneda, Kazuto Tsuji, Hirohisa Matsuki
  • Patent number: 6472744
    Abstract: A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: October 29, 2002
    Assignee: Fujitsu Limited
    Inventors: Mitsutaka Sato, Tetsuya Fujisawa, Shigeyuki Maruyama, Junichi Kasai, Toshimi Kawahara, Toshio Hamano, Yoshihiro Kubota, Mitsunada Osawa, Yoshiyuki Yoneda, Kazuto Tsuji, Hirohisa Matsuki
  • Patent number: 6379997
    Abstract: A semiconductor device includes a semiconductor element, a holding substrate holding the semiconductor element, a frame body provided on the holding substrate so as to surround the semiconductor element and having a hole which communicates to a space formed between the holding substrate and the frame body and the frame body and the holding substrate form a housing, a plurality of leads having inner lead portions connected to the semiconductor element and outer lead portions extending outside the frame body, and a resin filling the space and encapsulating the semiconductor element and the inner lead portions. All of the outer lead portions extend outside the housing from one side of the housing.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: April 30, 2002
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Toshimi Kawahara, Sinya Nakaseko, Mitsunada Osawa, Mayumi Osumi, Hiroyuki Ishiquro, Yoshitugu Katoh, Junichi Kasai, Shinichirou Taniguchi, Yuji Sakurai
  • Publication number: 20020030258
    Abstract: A method includes a resin sealing step of placing, in a cavity 28 of a mold 20, a substrate 16 to which semiconductor elements 11 on which bumps 12 are arranged, a resin sealing step of supplying resin 35 to positions of the bumps 12 so that a resin layer 13 sealing the bumps 12 is formed, a protruding electrode exposing step of exposing at least ends of the bumps 12 sealed by the resin layer 13 so that ends of the bumps 12 are exposed from the resin layer 13, and a separating step of cutting the substrate 16 together with the resin layer 13 so that the semiconductor elements 11 are separated from each other.
    Type: Application
    Filed: January 23, 2001
    Publication date: March 14, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Norio Fukasawa, Toshimi Kawahara, Muneharu Morioka, Mitsunada Osawa, Yasuhiro Shinma, Hirohisa Matsuki, Masanori Onodera, Junichi Kasai, Shigeyuki Maruyama, Masao Sakuma, Yoshimi Suzuki, Masashi Takenaka
  • Publication number: 20020000645
    Abstract: A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.
    Type: Application
    Filed: May 26, 1998
    Publication date: January 3, 2002
    Inventors: MITSUTAKA SATO, TETSUYA FUJISAWA, SHIGEYUKI MARUYAMA, JUNICHI KASAI, TOSHIMI KAWAHARA, TOSHIO HAMANO, YOSHIHIRO KUBOTA, MITSUNADA OSAWA, YOSHIYUKI YONEDA, KAZUTO TSUJI, HIROHISA MATSUKI
  • Publication number: 20010003049
    Abstract: A method includes a resin sealing step of placing, in a cavity 28 of a mold 20, a substrate 16 to which semiconductor elements 11 on which bumps 12 are arranged, a resin sealing step of supplying resin 35 to positions of the bumps 12 so that a resin layer 13 sealing the bumps 12 is formed, a protruding electrode exposing step of exposing at least ends of the bumps 12 sealed by the resin layer 13 so that ends of the bumps 12 are exposed from the resin layer 13, and a separating step of cutting the substrate 16 together with the resin layer 13 so that the semiconductor elements 11 are separated from each other.
    Type: Application
    Filed: May 15, 1998
    Publication date: June 7, 2001
    Inventors: NORIO FUKASAWA, TOSHIMI KAWAHARA, MUNEHARU MORIOKA, MITSUNADA OSAWA, YASUHIRO SHINMA, HIROHISA MATSUKI, MASANORI ONODERA, JUNICHI KASAI, SHIGEYUKI MARUYAMA, MASAO SAKUMA, YOSHIMI SUZUKI, MASASHI TAKENAKA
  • Patent number: 6111306
    Abstract: A semiconductor device includes a semiconductor element, a holding substrate holding the semiconductor element, a frame body provided on the holding substrate so as to surround the semiconductor element and having a hole which communicates to a space formed between the holding substrate and the frame body and the frame body and the holding substrate form a housing, a plurality of leads having inner lead portions connected to the semiconductor element and outer lead portions extending outside the frame body, and a resin filling the space and encapsulating the semiconductor element and the inner lead portions. All of the outer lead portions extend outside the housing from one side of the housing.
    Type: Grant
    Filed: October 6, 1997
    Date of Patent: August 29, 2000
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Toshimi Kawahara, Sinya Nakaseko, Mitsunada Osawa, Mayumi Osumi, Hiroyuki Ishiguro, Yoshitugu Katoh, Junichi Kasai, Shinichirou Taniguchi, Yuji Sakurai
  • Patent number: 6034428
    Abstract: A semiconductor device includes a semiconductor chip, and a multi-layered member connected to the semiconductor chip. The multi-layered member includes one or a plurality of wiring layers and one or a plurality of insulating layers alternately stacked. The one or the plurality of insulating layers have holes. The multi-layered member has electrode parts which include deformed portions of the above one or the plurality of wiring layers obtained by deforming the above one or the plurality of wiring layers via said holes.
    Type: Grant
    Filed: November 8, 1996
    Date of Patent: March 7, 2000
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Toshimi Kawahara, Hiroyuki Ishiguro, Mitsunada Osawa, Shinichirou Taniguchi, Mayumi Osumi, Shinya Nakaseko, Yoshitugu Katoh, Junichi Kasai
  • Patent number: 5844309
    Abstract: An adhesive composition including: a main component comprising a resin material, a solvent for dissolving said main component, and a filler added to said main component, wherein said filler has a particle size so as to make a concavo-convex depth of a surface of said adhesive composition equal to or less than 15 .mu.m after said adhesive composition is applied to an adherend and dried in order to evaporate said solvent before a thermocompression process. The present invention also discloses a semiconductor device using the adhesive composition, an adhering method using the adhesive composition and a method for producing a semiconductor device using the adhesive composition.
    Type: Grant
    Filed: December 3, 1996
    Date of Patent: December 1, 1998
    Assignee: Fujitsu Limited
    Inventors: Yukio Takigawa, Shigeaki Yagi, Toshimi Kawahara, Mitsunada Osawa, Hiroyuki Ishiguro, Shinya Nakaseko, Takashi Hozumi, Masaaki Seki
  • Patent number: 5804467
    Abstract: A semiconductor device includes a substrate having top and bottom surfaces, a semiconductor element mounted on the top surface of the substrate, and a resin package made of a resin and encapsulating the semiconductor element. The substrate includes at least one resin gate hole enabling the resin to be introduced from the bottom surface of the substrate via the resin gate hole when encapsulating the semiconductor element by the resin.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: September 8, 1998
    Assignees: Fujistsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Toshimi Kawahara, Shinya Nakaseko, Mitsunada Osawa, Shinichirou Taniguchi, Mayumi Osumi, Hiroyuki Ishiguro, Yoshitugu Katoh, Junichi Kasai
  • Patent number: 5679978
    Abstract: A semiconductor device includes a substrate having top and bottom surfaces, a semiconductor element mounted on the top surface of the substrate, and a resin package made of a resin and encapsulating the semiconductor element. The substrate includes at least one resin gate hole enabling the resin to be introduced from the bottom surface of the substrate via the resin gate hole when encapsulating the semiconductor element by the resin.
    Type: Grant
    Filed: October 24, 1994
    Date of Patent: October 21, 1997
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Toshimi Kawahara, Shinya Nakaseko, Mitsunada Osawa, Shinichirou Taniguchi, Mayumi Osumi, Hiroyuki Ishiguro, Yoshitugu Katoh, Junichi Kasai
  • Patent number: 5226582
    Abstract: A wire-bonding method of an IC uses a capillary having a hole for guiding a bonding wire, the capillary moving vertically and horizontally with respect to the IC so as to bridge a loop between a first bonding and a subsequent second bonding of the wire on predetermined places. The method comprises the steps of heating a wire end extruding from a first opening of the hole to form a ball of the wire; performing the first bonding by a nail head bonding method; pulling the wire coming from the second opening. The tension imposed on the wire hardens a portion of the wire having been softened during the heating process, but is adequately low not break the wire; and moving the capillary so as to perform the second bonding.
    Type: Grant
    Filed: May 8, 1992
    Date of Patent: July 13, 1993
    Assignee: Fujitsu Limited
    Inventors: Akihiro Kubota, Mitsunada Osawa