Patents by Inventor Mitsunari Satake
Mitsunari Satake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20070161342Abstract: A polishing apparatus includes a belt-type surface plate stretched between two rollers each having a rotation shaft arranged in parallel to that of the other roller, a plurality of sheet-type polishing pads stuck on the surface plate, and a dresser for activating the polishing pads. Part of an upper end portion of each of the polishing pads facing an adjacent one of the polishing pads has an obtuse angle. Thus, the dresser is not caught by the upper end portion of each of the polishing pads, so that the generation of a scratch in the polishing pads. Therefore, a semiconductor wafer can be polished without causing a scratch thereon.Type: ApplicationFiled: February 27, 2007Publication date: July 12, 2007Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Eigo Shirakashi, Muneyuki Matsumoto, Mitsunari Satake, Kenji Kobayashi
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Publication number: 20040266322Abstract: A polishing apparatus includes a belt-type surface plate stretched between two rollers each having a rotation shaft arranged in parallel to that of the other roller, a plurality of sheet-type polishing pads stuck on the surface plate, and a dresser for activating the polishing pads. Part of an upper end portion of each of the polishing pads facing an adjacent one of the polishing pads has an obtuse angle. Thus, the dresser is not caught by the upper end portion of each of the polishing pads, so that the generation of a scratch in the polishing pads. Therefore, a semiconductor wafer can be polished without causing a scratch thereon.Type: ApplicationFiled: April 29, 2004Publication date: December 30, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Eigo Shirakashi, Muneyuki Matsumoto, Mitsunari Satake, Kenji Kobayashi
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Publication number: 20040248401Abstract: A TaN film and a Cu film are deposited successively over an insulating film formed with trenches. Then, a first CMP process is performed by using a slurry having a polishing rate for Cu sufficiently higher than a polishing rate for TaN and containing an agent for forming a protective film for Cu in a sufficient amount. As a result, the upper surface of the portion of the Cu film located in each of the trenches is positioned flush with the upper surface of TaN. Then, a second CMP process is performed under such a condition that the polishing rate for Cu is equal to or higher than the polishing rate for TaN, thereby forming Cu wires. By properly changing conditions for the second CMP process in accordance with the level of the upper surface of the Cu film, the upper surface of the Cu film is positioned flush with or lower in level than the upper surface of the insulating film after the second CMP process so that the occurrence of defective wiring is reduced.Type: ApplicationFiled: June 3, 2004Publication date: December 9, 2004Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Mitsunari Satake, Muneyuki Matsumoto
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Patent number: 6746962Abstract: A first metal film is deposited on a bottom and a wall of a recess formed in an insulating film on a semiconductor substrate. A second metal film is filled in the recess on the first metal film. The second metal film is formed from a polycrystalline tungsten film having a crystal plane of a (110) orientation.Type: GrantFiled: October 18, 2001Date of Patent: June 8, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takenobu Kishida, Takeshi Harada, Toru Hinomura, Hiromitsu Abe, Mitsunari Satake, Kenichi Kunimitsu
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Patent number: 6737348Abstract: Holes are formed in a first insulating film deposited on a substrate. After depositing a first conducting film over the first insulating film including the holes, the first conducting film is subjected to first CMP, so as to form plugs from the first conducting film. Next, the first insulating film is subjected to second CMP with a polishing rate of the first insulating film higher than a polishing rate of the first conducting film, so as to planarize the first insulating film by eliminating erosion caused in a region of the first insulating film where the plugs are densely formed. After depositing a second insulating film on the planarized first insulating film, interconnect grooves are formed in the second insulating film. After depositing a second conducting film over the second insulating film including the interconnect grooves, the second conducting film is subjected to third CMP, so as to form buried interconnects from the second conducting film.Type: GrantFiled: April 12, 2002Date of Patent: May 18, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Mitsunari Satake, Masashi Hamanaka, Hideaki Yoshida
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Publication number: 20020168846Abstract: Holes are formed in a first insulating film deposited on a substrate. After depositing a first conducting film over the first insulating film including the holes, the first conducting film is subjected to first CMP, so as to form plugs from the first conducting film. Next, the first insulating film is subjected to second CMP with a polishing rate of the first insulating film higher than a polishing rate of the first conducting film, so as to planarize the first insulating film by eliminating erosion caused in a region of the first insulating film where the plugs are densely formed. After depositing a second insulating film on the planarized first insulating film, interconnect grooves are formed in the second insulating film. After depositing a second conducting film over the second insulating film including the interconnect grooves, the second conducting film is subjected to third CMP, so as to form buried interconnects from the second conducting film.Type: ApplicationFiled: April 12, 2002Publication date: November 14, 2002Inventors: Mitsunari Satake, Masashi Hamanaka, Hideaki Yoshida
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Publication number: 20020050648Abstract: A first metal film is deposited on a bottom and a wall of a recess formed in an insulating film on a semiconductor substrate. A second metal film is filled in the recess on the first metal film. The second metal film is formed from a polycrystalline tungsten film having a crystal plane of a (110) orientation.Type: ApplicationFiled: October 18, 2001Publication date: May 2, 2002Inventors: Takenobu Kishida, Takeshi Harada, Toru Hinomura, Hiromitsu Abe, Mitsunari Satake, Kenichi Kunimitsu
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Patent number: 6074289Abstract: An apparatus for holding a substrate to be polished comprises: a rotating rotary shaft; a substrate holding head in the form of a disc; a sealing member provided to the back face of the substrate holding head; a guiding member which is provided to the back face of the substrate holding head to be located outside the sealing member; and a fluid flow path which vertically penetrates the inside of the substrate holding head. The fluid flow path allows an air under pressure introduced from the upper end side thereof to flow out through the opening at the lower end thereof to a space. The sealing member is formed with a ventilation body having a large number of successive vent openings in the inside such as nonwoven fabric.Type: GrantFiled: December 16, 1997Date of Patent: June 13, 2000Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tomoyasu Murakami, Mikio Nishio, Mitsunari Satake
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Patent number: 6012967Abstract: A rotatable platen has a polishing pad adhered to the top surface thereof. A carrier for holding a substrate and a slurry supply pipe for supplying an abrasive slurry onto the near-center region of the polishing pad are provided above the polishing pad. Two lamps for partially irradiating the surface of the polishing pad with visible light or infrared light are provided at respective locations above the polishing pad and upstream of the carrier in the direction of rotation of the platen. Of the area of the polishing pad in contact with the substrate, a region closer to the center of rotation of the polishing pad and a region farther away therefrom are heated by the two lamps.Type: GrantFiled: November 26, 1997Date of Patent: January 11, 2000Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Mitsunari Satake, Mikio Nishio, Tomoyasu Murakami