Patents by Inventor Mitsunori Hatada

Mitsunori Hatada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High frequency circuit chip and method of producing the same
    Publication number: 20050104218
    Abstract: In the production of a high frequency circuit chip in which a wiring pattern is disposed on a substrate having a through-hole, a connecting electrode of the through-hole is formed by filling electrically conductive paste into a perforation and firing it, and the wiring pattern is formed by a lift-off method. Moreover, at least the surface of the substrate for the wiring pattern to be formed thereon is mirror-polished, and thereafter, the wiring pattern is formed on the mirror-polished surface by the lift-off method.
    Type: Application
    Filed: November 19, 2004
    Publication date: May 19, 2005
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Yoshiyuki Tonami, Mitsunori Hatada
  • High frequency circuit chip and method of producing the same
    Patent number: 6838377
    Abstract: In the production of a high frequency circuit chip in which a wiring pattern is disposed on a substrate having a through-hole, a connecting electrode of the through-hole is formed by filling electrically conductive paste into a perforation and firing it, and the wiring pattern is formed by a lift-off method. Moreover, at least the surface of the substrate for the wiring pattern to be formed thereon is mirror-polished, and thereafter, the wiring pattern is formed on the mirror-polished surface by the lift-off method.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: January 4, 2005
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yoshiyuki Tonami, Mitsunori Hatada
  • High frequency circuit chip and method of producing the same
    Publication number: 20020125566
    Abstract: In the production of a high frequency circuit chip in which a wiring pattern is disposed on a substrate having a through-hole, a connecting electrode of the through-hole is formed by filling electrically conductive paste into a perforation and firing it, and the wiring pattern is formed by a lift-off method. Moreover, at least the surface of the substrate for the wiring pattern to be formed thereon is mirror-polished, and thereafter, the wiring pattern is formed on the mirror-polished surface by the lift-off method.
    Type: Application
    Filed: March 5, 2002
    Publication date: September 12, 2002
    Inventors: Yoshiyuki Tonami, Mitsunori Hatada