Patents by Inventor Mitsunori Sakama
Mitsunori Sakama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9806096Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: GrantFiled: November 18, 2015Date of Patent: October 31, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Publication number: 20160172382Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: ApplicationFiled: November 18, 2015Publication date: June 16, 2016Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Patent number: 9196632Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: GrantFiled: December 13, 2013Date of Patent: November 24, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Publication number: 20140139776Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: ApplicationFiled: December 13, 2013Publication date: May 22, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Patent number: 8610182Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: GrantFiled: April 5, 2012Date of Patent: December 17, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Patent number: 8304350Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: GrantFiled: February 12, 2010Date of Patent: November 6, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
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Patent number: 8278195Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: GrantFiled: November 2, 2011Date of Patent: October 2, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Publication number: 20120187411Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: ApplicationFiled: April 5, 2012Publication date: July 26, 2012Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Patent number: 8154059Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: GrantFiled: October 22, 2010Date of Patent: April 10, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Publication number: 20120045593Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: ApplicationFiled: November 2, 2011Publication date: February 23, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Toru TAKAYAMA, Mitsunori SAKAMA, Hisashi ABE, Hiroshi UEHARA, Mika ISHIWATA
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Patent number: 8053338Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: GrantFiled: April 2, 2009Date of Patent: November 8, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Publication number: 20110034215Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: ApplicationFiled: October 22, 2010Publication date: February 10, 2011Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Patent number: 7821071Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: GrantFiled: March 6, 2009Date of Patent: October 26, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Publication number: 20100144077Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: ApplicationFiled: February 12, 2010Publication date: June 10, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Hisashi OHTANI, Hiroyuki SHIMADA, Mitsunori SAKAMA, Hisashi ABE, Satoshi TERAMOTO
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Patent number: 7723218Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: GrantFiled: April 11, 2005Date of Patent: May 25, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
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Patent number: 7691692Abstract: A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber. More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.Type: GrantFiled: September 17, 2008Date of Patent: April 6, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani, Hiroyuki Shimada, Mitsunori Sakama, Hisashi Abe, Satoshi Teramoto
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Publication number: 20090224260Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: ApplicationFiled: March 6, 2009Publication date: September 10, 2009Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Publication number: 20090197012Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.Type: ApplicationFiled: April 2, 2009Publication date: August 6, 2009Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei YAMAZAKI, Toru TAKAYAMA, Mitsunori SAKAMA, Hisashi ABE, Hiroshi UEHARA, Mika ISHIWATA
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Patent number: 7504343Abstract: An object of the present invention is to prevent the deterioration of a TFT (thin film transistor). The deterioration of the TFT by a BT test is prevented by forming a silicon oxide nitride film between the semiconductor layer of the TFT and a substrate, wherein the silicon oxide nitride film ranges from 0.3 to 1.6 in a ratio of the concentration of N to the concentration of Si.Type: GrantFiled: May 5, 2006Date of Patent: March 17, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiko Hayakawa, Mitsunori Sakama, Satoshi Toriumi
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Patent number: 7491659Abstract: In forming various types of insulating films in manufacture of a semiconductor device, carbon is gasified into CHx, COH etc. during film formation by adding active hydrogen and nitrogen oxide to reduce the carbon content during the film formation, and the effect of blocking impurities such as alkali metals is improved.Type: GrantFiled: December 18, 2003Date of Patent: February 17, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Mitsunori Sakama, Takeshi Fukada