Patents by Inventor Mitsuo DATE

Mitsuo DATE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10908988
    Abstract: A storage apparatus includes: a controller; and a plurality of storage drives, wherein the controller issues a read command for specifying a value associated with an error correction mode to a first storage drive of the plurality of storage drives, the first storage drive selects the error correction mode associated with the value specified by the read command from a plurality of error correction modes, the plurality of error correction modes include a first error correction mode and a second error correction mode with a higher correcting capability and a longer maximum delay time than those of the first error correction mode, and the first storage drive executes a read of data from a storage medium in the selected error correction mode.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: February 2, 2021
    Assignee: Hitachi, Ltd.
    Inventors: Mitsuo Date, Hideyuki Koseki, Akifumi Suzuki, Masahiro Tsuruya
  • Patent number: 10782917
    Abstract: High reliability and high performance of a storage device formed of a Dual port NVMe SSD are achieved while preventing the risk of destruction of data. The storage device includes a main memory that belongs to each of two or more clusters and that stores data related to an IO request; and a processor belonging to each of the clusters controlling accesses to the main memory. The main memory includes a first region where writing from the memory drive is permitted and a second region where the writing is prohibited. The processor selects the first region as a transfer destination related to the IO request from the memory drive when the IO request is a first request, and selects the second region as the transfer destination related to the IO request from the memory drive while permitting writing to the second region when the IO request is a second request.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: September 22, 2020
    Assignee: HITACHI, LTD.
    Inventors: Naoya Okada, Masanori Takada, Mitsuo Date, Sadahiro Sugimoto, Norio Simozono
  • Publication number: 20200192601
    Abstract: High reliability and high performance of a storage device formed of a Dual port NVMe SSD are achieved while preventing the risk of destruction of data. The storage device includes a main memory that belongs to each of two or more clusters and that stores data related to an IO request; and a processor belonging to each of the clusters controlling accesses to the main memory. The main memory includes a first region where writing from the memory drive is permitted and a second region where the writing is prohibited. The processor selects the first region as a transfer destination related to the IO request from the memory drive when the IO request is a first request, and selects the second region as the transfer destination related to the IO request from the memory drive while permitting writing to the second region when the IO request is a second request.
    Type: Application
    Filed: May 12, 2016
    Publication date: June 18, 2020
    Inventors: Naoya OKADA, Masanori TAKADA, Mitsuo DATE, Sadahiro SUGIMOTO, Norio SIMOZONO
  • Publication number: 20190213078
    Abstract: A storage apparatus includes: a controller; and a plurality of storage drives, wherein the controller issues a read command for specifying a value associated with an error correction mode to a first storage drive of the plurality of storage drives, the first storage drive selects the error correction mode associated with the value specified by the read command from a plurality of error correction modes, the plurality of error correction modes include a first error correction mode and a second error correction mode with a higher correcting capability and a longer maximum delay time than those of the first error correction mode, and the first storage drive executes a read of data from a storage medium in the selected error correction mode.
    Type: Application
    Filed: April 3, 2017
    Publication date: July 11, 2019
    Inventors: Mitsuo DATE, Hideyuki KOSEKI, Akifumi SUZUKI, Masahiro TSURUYA
  • Publication number: 20180052632
    Abstract: This storage system includes a processor, a memory, a storage drive, and an interface device. The storage drive determines a size of transfer data based on an offset value which is a value relating to a size between the beginning of a storage area in the memory for the transfer of the data to be transferred to the interface device and the beginning of the partition of the memory to which the beginning of the storage area belongs, and then transfers data to be transferred, which has the determined size, to the interface device. The interface device divides the transferred data into packets and transfers these packets to the processor. The processor then stores the packets transferred from the interface device in the memory on a unit of a partition.
    Type: Application
    Filed: May 11, 2015
    Publication date: February 22, 2018
    Inventors: Masanori TAKADA, Naoya OKADA, Mitsuo DATE, Tsutomu KOGA