Patents by Inventor Mitsuo Soneda

Mitsuo Soneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4584608
    Abstract: A solid state image pickup device comprises a plurality of image pickup picture units (E.sub.11 to E.sub.mn) arrayed in horizontal and vertical rows and composed of first switching elements (S.sub.11 to S.sub.mn) and photoelectric transducers (D.sub.11 to D.sub.mn : 24) electrically connected to the first switching elements (S.sub.11 to S.sub.mn), and a plurality of second switching elements (T'.sub.1 to T'.sub.n) connected in common to the respective vertical rows of the first switching elements (S.sub.11 to S.sub.mn) in the image pickup picture units (E.sub.11 to E.sub.mn) and each composed of a depletion-mode insulated-gate field-effect transistors. The horizontal rows of the first switching elements (S.sub.11 to S.sub.mn) in the image pickup picture units (E.sub.11 to E.sub.mn) are selectively energizable and the second switching elements (T'.sub.1 to T'.sub.n) are also selectively energizable to deliver signals based on signal charge generated by the photoelectric transducers (D.sub.11 to D.sub.
    Type: Grant
    Filed: December 5, 1983
    Date of Patent: April 22, 1986
    Assignee: Sony Corporation
    Inventors: Mitsuo Soneda, Toshikazu Maekawa, Takaji Ohtsu
  • Patent number: 4578597
    Abstract: A pulse generating circuit comprises a first series connection of a first switching element (3:13) and a second switching element (4), a second series connection of a capacitive element (5) and a third switching element (6) coupled with a connecting point between the first and second switching elements, an amplifying element (7) having input and output terminals connected to both ends of the capacitive element (5), respectively, and a fourth switching element (8) connected to the output end of the amplifying element (7), and is supplied with a first input signal varying in level through the control terminals of the first and third switching elements (3:13, 6) and a second input signal varying in level through the control terminals of the second and fourth switching elements (4, 8), thereby to obtain a pulse having the width corresponding to the time interval from a variation in the level of the first input signal to a variation in the level of the second input signal at the output end of the amplifying elemen
    Type: Grant
    Filed: November 2, 1983
    Date of Patent: March 25, 1986
    Assignee: Sony Corporation
    Inventors: Mitsuo Soneda, Manami Fukuzawa, Takaji Ohtsu
  • Patent number: 4538288
    Abstract: A signal translating circuit is disclosed in which an input signal is supplied to a source follower transistor, a bootstrap capacitive component is presented between the gate and source of the source follower transistor, the signal from the source follower transistor is supplied through a first transmission gate to a next stage, and also led out to an output terminal. Further, the circuit formed of the source follower transistor and the first transmission gate is sequentially connected and the source follower transistor and the first transmission gate are alternately driven with different phases to each other whereby the input signal is sequentially transmitted at each stage.
    Type: Grant
    Filed: September 1, 1983
    Date of Patent: August 27, 1985
    Assignee: Sony Corporation
    Inventors: Mitsuo Soneda, Toshikazu Maekawa, Kouji Otsu
  • Patent number: 4533954
    Abstract: In a solid state image pickup apparatus comprising a solid state image pickup device (1) which has an image pickup surface composed of a plurality of image pickup picture units (E.sub.11 -E.sub.mn), each of which contains a first switching element (S.sub.11, S.sub.12, . . . S.sub.mn) and a photoelectric converter (D.sub.11, D.sub.12, . . . D.sub.mn) electrically connected to the first switching element, and which are disposed in a predetermined arrangement and second switching elements (T.sub.1 -T.sub.n) connected to the image pickup picture units (E.sub.11 -E.sub.mn) and vertical and horizontal scanning circuits (13:14) for driving the first and second switching elements (S.sub.11 -S.sub.mn :T.sub.1 -T.sub.n), the vertical and horizontal scanning circuits (13:14) are made operative in a stable state to cause the first and second switching elements (S.sub.11 -S.sub.mn :T.sub.1 -T.sub.
    Type: Grant
    Filed: October 4, 1983
    Date of Patent: August 6, 1985
    Assignee: Sony Corporation
    Inventors: Mitsuo Soneda, Toshikazu Maekawa
  • Patent number: 4485380
    Abstract: A liquid crystal matrix display device has a plurality of liquid crystal display elements arranged in an X-Y matrix pattern. Vertical transmitting lines are connected to all of the display elements of each column, and horizontal transmitting lines are connected to each of the display elements of each row. Each of the vertical lines is connected through an input switching element to an input circuit to receive a video input signal and a horizontal pulse generator provides sequential pulse signals to control terminals of the input switching elements. In order to compensate for crosstalk that occurs because of parasitic capacitance between the vertical transmitting lines and the liquid crystal display elements, auxiliary lines are provided for the columns of such display elements, and each has a predetermined compensating capacitance relative to its associated liquid crystal display elements.
    Type: Grant
    Filed: June 8, 1982
    Date of Patent: November 27, 1984
    Assignee: Sony Corporation
    Inventors: Mitsuo Soneda, Takaji Ohtsu, Ken Kutaragi
  • Patent number: 4466018
    Abstract: Solid-state image pickup apparatus, such as an MOS imager, has a two-dimensional array of picture element units each formed of a photo sensitive element and a gating element. The picture unit elements discharge a signal charge onto vertical and horizontal transmitting lines in response to vertical and horizontal scanning pulses. Then, a resulting signal current is used to develop an output video signal. In order to give the output video signal a good S/N ratio, a gain-controlled current amplifier is employed. In several embodiments, the gain-controlled amplifier includes first through fourth transistors with the base-emitter junctions of the first and second transistors and of the third and fourth transistors connected in series, with a constant current source coupled to the first transistor, controlled current sources connected to the second and third transistors, and a load device coupled to the fourth transistor.
    Type: Grant
    Filed: May 19, 1982
    Date of Patent: August 14, 1984
    Assignee: Sony Corporation
    Inventors: Mitsuo Soneda, Takashi Noguchi, Takaji Ohtsu
  • Patent number: 4463383
    Abstract: Solid-state image pickup apparatus, such as an MOS imager, has a two-dimensional array of picture element units each formed of a photo sensitive element and a gating element, and scanning circuits for supplying horizontal and vertical scanning pulses. The picture unit elements in turn discharge a signal charge onto vertical and horizontal transmitting lines in response to the vertical and horizontal scanning pulses. Then, a resulting signal current is used to develop an output video signal. In order to provide a strong output video signal with a good S/N ratio, a current mirror circuit, formed of an input transistor and an output transistor with first current-carrying electrodes joined together to a voltage reference point and with control electrodes joined together, amplifies the signal current. A second current-carrying electrode of the input transistor receives a constant current from a current source and also receives the signal current.
    Type: Grant
    Filed: May 5, 1982
    Date of Patent: July 31, 1984
    Assignee: Sony Corporation
    Inventors: Mitsuo Soneda, Takashi Noguchi, Takaji Ohtsu
  • Patent number: 4447812
    Abstract: A liquid crystal matrix display device has a plurality of display elements arranged in an X-Y matrix pattern. Vertical transmitting lines are connected to all of the display elements of each column, and horizontal transmitting lines are connected to each of the display elements of each row. Each of the vertical lines is connected through an input switching element to an input circuit to receive a video input signal and a horizontal pulse generator provides sequential pulse signals to control terminals of the input switching elements. In order to improve the resolution without sacrifice of contrast, the vertical transmitting lines are arranged into groups of a predetermined number of such lines, and the input switching elements associated with the lines of each such group have their control electrodes coupled together to a respective output of the horizontal scanning pulse generator.
    Type: Grant
    Filed: June 3, 1982
    Date of Patent: May 8, 1984
    Assignee: Sony Corporation
    Inventors: Mitsuo Soneda, Takaji Ohtsu
  • Patent number: 4405908
    Abstract: A filter circuit comprising a charge transfer device of the type which includes first and second sets of charge storage devices, such as capacitors, the first and second sets of charge storage devices being supplied with first and second clock signals, respectively, and further including first and second sets of switches which are actuated in response to the first and second clock signals, respectively, each switch being operable, when actuated, to transfer charge between a charge storage device in one set and a charge storage device in the other set, thereby transferring a charge through succeeding switches to be temporarily stored in succeeding charge storage devices. A semiconductor element, such as a transistor, is actuated in response either to the first or to the second clock signals for transferring the charge stored in a first predetermined charge storage device to a second predetermined charge storage device.
    Type: Grant
    Filed: April 17, 1981
    Date of Patent: September 20, 1983
    Assignee: Sony Corporation
    Inventor: Mitsuo Soneda
  • Patent number: 4383326
    Abstract: A bucket brigaded device is provided which includes first and second clocking signal generators for generating a first set and a second set of clocking signals respectively, a plurality of successive capacitors for sequentially holding charge level representing an input signal, and a plurality of transistors for controlling the transfer of charge levels from one capacitor to another. Each of the transistors is connected between adjacent capacitors.The bucket brigaded device further comprises a first clocking signal driver for supplying one of the first set of clocking signals to each capacitor, and a second clocking signal driver for supplying one of the second set of clocking signals to each transistor.
    Type: Grant
    Filed: November 28, 1980
    Date of Patent: May 10, 1983
    Assignee: Sony Corporation
    Inventors: Takao Tsuchiya, Mitsuo Soneda, Isa Nakamura
  • Patent number: 4344001
    Abstract: A clocking signal drive circuit supplies at least one clocking signal in a charge transfer device which has a plurality of successive capacitive storage elements for sequentially holding a charge level representing a time sampled input signal, with each of the capacitive storage elements having a clocking electrode for receiving one of a plurality of clocking signals so that the charge level representing the time sampled input signal is transferred from one to another of the capacitive storage means in succession in response to the clocking signals.
    Type: Grant
    Filed: December 12, 1979
    Date of Patent: August 10, 1982
    Assignee: Sony Corporation
    Inventors: Takao Tsuchiya, Mitsuo Soneda
  • Patent number: 4314162
    Abstract: A filter circuit of the type utilizing a charge-transfer device, such as a bucket brigade device, comprises a clocking signal drive circuit for supplying a clocking signal; a clock signal generator at whose output a clocking control signal is provided; a transistor whose base is connected to the output of the clock signal generator; a plurality of successive capacitive storage stages for sequentially holding a charge level representing a time-sampled input signal, each of the capacitive storage stages having a clocking electrode for receiving the clocking signal so that the charge level is transferred from one to another of the capacitive storage stages in succession, and at least one of the capacitive storage stages being formed of first and second parallel-connected capacitive circuit portions, and the first and second capacitive circuit portions having respective clocking electrodes coupled to the clock signal generator and to the emitter of the transistor, respectively; and a current feedback circuit, suc
    Type: Grant
    Filed: January 3, 1980
    Date of Patent: February 2, 1982
    Assignee: Sony Corporation
    Inventors: Takao Tsuchiya, Mitsuo Soneda
  • Patent number: 4308509
    Abstract: A non-recursive transversal filter circuit employs a charge transfer device in which certain of the capacitive storage elements are divided into first and second capacitive portions having predetermined capacitance relationships. The charge in the second capacitive storage elements is sensed at predetermined times to produce an output signal. The relative capacitances of the second capacitance portions provide weighting factors to the filter. Embodiments include bucket brigade devices with bipolar and FET transistors as well as charge coupled devices.
    Type: Grant
    Filed: January 18, 1980
    Date of Patent: December 29, 1981
    Assignee: Sony Corporation
    Inventors: Takao Tsuchiya, Mitsuo Soneda