Abstract: A random access memory comprises an array of a plurality of storing locations, address signal lines for addressing the plurality of storing locations, a data signal line commonly coupled to said plurality of storing locations for inputting or outputting data signals, each said location comprising an output inverter circuit having the output connected to the data signal line, a first switching element, coupled to the output inverter circuit, which is placed in nonconductive states in a writing operation mode of the random access memory, and a second switching means connected to the data signal line for receiving pre-charge signals in synchronization with access signals held on the address signal line so that the data signal line is precharged prior to a reading operation mode of the random access memory.