Patents by Inventor Mitsurou Nakajima

Mitsurou Nakajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180059712
    Abstract: A wireless communication apparatus includes a memory, and a processor coupled to the memory and configured to calculate a variation amount based on a frequency difference between a first clock signal in a first synchronous processing apparatus and a second clock signal in the wireless communication apparatus according to a first message exchanged between the first synchronous processing apparatus and the wireless communication apparatus, calculate a correction amount based on a phase difference between a first time in a second synchronous processing apparatus and a second time in the wireless communication apparatus according to a second message exchanged between the second synchronous processing apparatus and the wireless communication apparatus, and when a failure is detected in the first synchronous processing apparatus based on the variation amount and the correction amount, switch an object for synchronization from the first synchronous processing apparatus to the second synchronous processing apparatus.
    Type: Application
    Filed: August 7, 2017
    Publication date: March 1, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Kenji KAZEHAYA, Mitsurou NAKAJIMA, Shigeaki KAWAMATA, Yoshinobu IMAI, Jun ROPPONGI
  • Patent number: 6924665
    Abstract: A logic device re-programmable without terminating operation. In the logic device, a logic circuit is configured and maintained based on logic circuit configuration data for implementing a desired function. The logic device comprises: a memory holding the logic circuit configuration data for configuring and maintaining the logic circuit; and an address controller for writing, in an unused area of the memory, logic circuit configuration data for configuring and maintaining one or more additional logic circuits without terminating operation of the logic device. It is an object of the present invention to provide a logic device in which data re-writing, such as addition of functions and correction of problems, is available as required, without terminating operation of the device.
    Type: Grant
    Filed: January 16, 2004
    Date of Patent: August 2, 2005
    Assignee: Fujitsu Limited
    Inventors: Mitsurou Nakajima, Takayasu Mochida
  • Publication number: 20040174186
    Abstract: A logic device re-programmable without terminating operation. In the logic device, a logic circuit is configured and maintained based on logic circuit configuration data for implementing a desired function. The logic device comprises: a memory holding the logic circuit configuration data for configuring and maintaining the logic circuit; and an address controller for writing, in an unused area of the memory, logic circuit configuration data for configuring and maintaining one or more additional logic circuits without terminating operation of the logic device. It is an object of the present invention to provide a logic device in which data re-writing, such as addition of functions and correction of problems, is available as required, without terminating operation of the device.
    Type: Application
    Filed: January 16, 2004
    Publication date: September 9, 2004
    Inventors: Mitsurou Nakajima, Takayasu Mochida