Patents by Inventor Mitsuru Asano

Mitsuru Asano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080094425
    Abstract: In an embodiment of the present invention, basic reference voltages VRT, VRB, VR, VG, and VB are divided by resistors to produce plural reference voltages V0 to V15, and voltages are selected from these plural reference voltages V0 to V15 for digital-analog conversion processing of image data DR, DG, and DB. At least the basic reference voltage VRB for the black level is shared by the respective color data DR, DG, and DB. The basic reference voltages VR, VG, and VB for setting of an intermediate grayscale closer to the black level can be varied individually for each of the color data DR, DG, and DB. When this embodiment is applied to a display device employing current-driven light-emitting elements such as organic EL elements, contrast deterioration due to floating black and sinking black can be prevented with a simple configuration.
    Type: Application
    Filed: October 17, 2007
    Publication date: April 24, 2008
    Applicant: SONY CORPORATION
    Inventor: Mitsuru Asano
  • Publication number: 20080079670
    Abstract: Disclosed herein is an image display apparatus, including: a plurality of scanning lines extending along rows and configured to successively supply a control signal in synchronism with a horizontal period in order to perform line-sequential scanning over one field; a plurality of signal lines extending along columns and configured to supply an image signal in accordance with the line-sequential scanning; and a plurality of pixel circuits disposed at locations at which the scanning lines and the signal lines intersect with each other and configured to form a screen.
    Type: Application
    Filed: May 18, 2007
    Publication date: April 3, 2008
    Applicant: Sony Corporation
    Inventor: Mitsuru Asano
  • Publication number: 20080048955
    Abstract: A pixel circuit is disposed where a scan line arranged in a row direction to supply a control signal and a data line arranged in a column direction to supply a video signal intersect each other. The pixel circuit includes: a sampling transistor; a drive transistor; a capacitor connected between the current path end of the sampling transistor and the gate of the drive transistor; and a light-emitting device connected to the current path end of the drive transistor. The pixel circuit connects the mobility with negative feedback during a mobility connection period.
    Type: Application
    Filed: August 13, 2007
    Publication date: February 28, 2008
    Applicant: Sony Corporation
    Inventors: Akira Yumoto, Mitsuru Asano, Seiichiro Jinta
  • Publication number: 20080049053
    Abstract: Disclosed herein is a display apparatus, including: a pixel array section wherein a plurality of pixel circuits each including an electro-optical element, a driving transistor, a sampling transistor and a capacitor are disposed in a matrix; a dependence cancellation section configured to negatively feed back, within a correction period before said electro-optical element emits light in a state wherein the image signal is written by said sampling transistor, drain-source current of said driving transistor to the gate input side of said driving transistor to cancel the dependence of the drain-source current of said driving transistor on the mobility; and a scanning section configured to use an AC power supply as a power supply to a last stage buffer of an output circuit to produce a scanning signal which defines the correction period.
    Type: Application
    Filed: July 31, 2007
    Publication date: February 28, 2008
    Applicant: Sony Corporation
    Inventors: Mitsuru Asano, Hiroshi Fujimura, Seiichiro Jinta, Masatsugu Tomida
  • Publication number: 20080042945
    Abstract: A pixel circuit is disclosed. The pixel circuit includes, at least a drive transistor; an input transistor; a first switching transistor; a second switching transistor; a retention capacity; and an electro-optic device. The retention capacity is connected, at both ends, to a gate node and a source node, respectively, of the drive transistor. The electro-optic device has rectification properties, and is determined in intensity by a value of a drive current coming from the drive transistor whose source node is connected to an anode thereof. The input transistor is connected, at one current end, to the gate node of the drive transistor, and samples a video signal to the retention capacity during a predetermined sampling period. The first switching transistor is turned on before the sampling period, and connects the gate node of the drive transistor at a predetermined reference voltage.
    Type: Application
    Filed: August 8, 2007
    Publication date: February 21, 2008
    Applicant: Sony Corporation
    Inventors: Takahiko Mutsukura, Mitsuru Asano, Seiichiro Jinta, Masatsugu Tomida
  • Publication number: 20080029768
    Abstract: Herein disclosed a display apparatus including: a pixel array having a matrix of pixel circuits each including respective electrooptical elements for determining a display brightness level and respective drive circuits for driving the electrooptical elements; wherein adjacent two of the pixel circuits are paired with each other, and each of the drive circuits of the adjacent two pixel circuits includes at least one transistor having a low-concentration source/drain region or an offset region of an offset gate structure, the electrooptical elements and the drive circuits of the adjacent two pixel circuits being laid out such that a line interconnecting a drain region and a source region of the at least one transistor extends parallel to a direction of pixel columns of the pixel circuits of the pixel array.
    Type: Application
    Filed: July 25, 2007
    Publication date: February 7, 2008
    Applicant: Sony Corporation
    Inventors: Mitsuru Asano, Seiichiro Jinta, Masatsugu Tomida, Hiroshi Fujimura
  • Publication number: 20080030446
    Abstract: A display apparatus includes: a pixel array section and dependence cancellation means. The pixel array section wherein a plurality of pixel circuits each including an electro-optical element, a driving transistor configured to drive said electro-optical element, a sampling transistor configured to sample and write an input signal voltage and a capacitor configured to hold a gate-source voltage of said driving transistor within a display period are disposed in a matrix. The dependence cancellation means for negatively feeding back, within a correction period before said electro-optical element emits light in a state wherein the input signal voltage is written by said sampling transistor, drain-source current of said driving transistor to the gate input side of said driving transistor to cancel the dependence of the drain-source current of said driving transistor on the mobility.
    Type: Application
    Filed: July 26, 2007
    Publication date: February 7, 2008
    Applicant: Sony Corporation
    Inventor: Mitsuru Asano
  • Publication number: 20080024529
    Abstract: The present invention provides a display device including a pixel array unit, a first power supply line, and a second power supply line. The pixel array unit is formed by two-dimensionally arranging pixel circuits each including an electrooptic element determining display luminance and a driving circuit for driving the electrooptic element in a form of a matrix. The first power supply line is for supplying a first power supply potential to the pixel circuits. The first power supply line is arranged along a direction of pixel arrangement of a pixel column in the pixel array unit. The second power supply line is for supplying a second power supply potential to the pixel circuits. The second power supply line isw arranged along the direction of the pixel arrangement of the pixel column in the pixel array unit.
    Type: Application
    Filed: July 17, 2007
    Publication date: January 31, 2008
    Applicant: Sony Corporation
    Inventors: Mitsuru Asano, Seiichiro Jinta, Hiroshi Fujimura, Masatsugu Tomida
  • Publication number: 20080001861
    Abstract: Herein disclosed an image display apparatus, including a pixel array section, and a peripheral circuit section. The pixel array section has a plurality of scanning lines extending along rows, a plurality of signal lines extending along columns, and a plurality of pixels disposed in a matrix at locations at which the scanning lines and the signal lines intersect with each other. The peripheral circuit section has a scanner and a driver. Each of the pixels contains a sampling transistor, a drive transistor, a switching transistor, and a light emitting element.
    Type: Application
    Filed: May 17, 2007
    Publication date: January 3, 2008
    Applicant: Sony Corporation
    Inventors: Mitsuru Asano, Junichi Yamashita, Akira Yumoto, Hiroshi Fujimura
  • Patent number: 7169003
    Abstract: A display unit and method of manufacturing same is provided. The display unit includes a drive panel and a sealing panel that face each other with a middle layer in between. The display panel includes a number of light-emitting devices on a drive substrate with a drive device layer and a coating layer that is provided over the drive device layer in between. The middle layer is disposed between the drive panel and the sealing panel so as to be laid over the light-emitting devices.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: January 30, 2007
    Assignee: Sony Corporation
    Inventors: Yuichi Iwase, Mitsuru Asano, Takashi Hirano
  • Publication number: 20060256058
    Abstract: A pixel electrode and a display device capable of lowering a power consumption with a uniformity of a luminance retained, and realizing a display image having a high contrast and a high image quality, wherein a correction period for correcting a variation of property of a drive transistor in a pixel during a frame, a write period for driving a first switch by a first control line and writing a data signal from a signal line to the node, and a drive period for storing the written data signal and driving a electro-optical element, are set, and the drive is controlled so that an interval having the correction period, the write period, and the drive period, and an interval having the write period and the drive period without the correction period exist.
    Type: Application
    Filed: May 3, 2006
    Publication date: November 16, 2006
    Applicant: Sony Corporation
    Inventors: Mitsuru Asano, Akira Yumoto, Hiroshi Fujimura
  • Publication number: 20060170624
    Abstract: When a current-writing type pixel circuit is made, it involves a greater number of transistors and TFTs occupy much of the area of the pixel circuit. To alleviate this problem, two pixel circuits (P1, P2) have a first scanning TFT (14), a current-voltage conversion TFT (16), respective second scanning TFTs (15-1, 15-2), capacitors (13-1, 13-2), and drive TFTs (12-1, 12-2) for OLED including organic EL elements (11-2, 11-2) of two pixels, for example, in a row direction. In each of the pixel circuits, the first scanning TFT (14) handling a large amount of current (Iw) as compare with current flowing through the OLED (11-2, 11-2), and the current-voltage conversion TFT (16) are shared between two pixels.
    Type: Application
    Filed: December 30, 2005
    Publication date: August 3, 2006
    Inventors: Akira Yumoto, Mitsuru Asano
  • Patent number: 7057588
    Abstract: In an active-matrix display device and a method for driving the active-matrix display device, a fifth transistor is connected between a power line and a drain terminal of a first transistor so that a power-supply voltage, namely the fixed voltage required for the compensation of the threshold voltage, is supplied by the power line via a fifth transistor and not by a signal line. Thus, a sufficient length of time for the threshold voltage compensation period can be maintained, and a second transistor of each pixel can accurately be compensated for threshold voltage irregularities.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: June 6, 2006
    Assignee: Sony Corporation
    Inventors: Mitsuru Asano, Akira Yumoto
  • Publication number: 20060099873
    Abstract: A display unit and method of manufacturing same is provided. The display unit includes a drive panel and a sealing panel that face each other with a middle layer in between. The display panel includes a number of light-emitting devices on a drive substrate with a drive device layer and a coating layer that is provided over the drive device layer in between. The middle layer is disposed between the drive panel and the sealing panel so as to be laid over the light-emitting devices.
    Type: Application
    Filed: December 23, 2005
    Publication date: May 11, 2006
    Inventors: Yuichi Iwase, Mitsuru Asano, Takashi Hirano
  • Patent number: 7034457
    Abstract: A display unit and method of manufacturing same is provided. The display unit includes a drive panel and a sealing panel that face each other with a middle layer in between. The display panel includes a number of light-emitting devices on a drive substrate with a drive device layer and a coating layer that is provided over the drive device layer in between. The middle layer is disposed between the drive panel and the sealing panel so as to be laid over the light-emitting devices.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: April 25, 2006
    Assignee: Sony Corporation
    Inventors: Yuichi Iwase, Mitsuru Asano, Takashi Hirano
  • Patent number: 7019717
    Abstract: When a current-writing type pixel circuit is made, it involves a greater number of transistors and TFTs occupy much of the area of the pixel circuit. To alleviate this problem, two pixel circuits (P1, P2) have a first scanning TFT (14), a current-voltage conversion TFT (16), respective second scanning TFTs (15-1, 15-2), capacitors (13-1,13-2), and drive TFTs (12-1, 12-2) for OLED including organic EL elements (11-2, 11-2) of two pixels, for example, in a row direction. In each of the pixel circuits, the first scanning TFT (14) handling a large amount of current (Iw) as compare with current flowing through the OLED (11-2, 11-2), and the current-voltage conversion TFT (16) are shared between two pixels.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: March 28, 2006
    Assignee: Sony Corporation
    Inventors: Akira Yumoto, Mitsuru Asano
  • Publication number: 20060033429
    Abstract: In a display device including, a display area having a plurality of organic EL devices on a substrate; a peripheral area having a driving circuit for the organic EL devices and surrounding the display area on the substrate; and an organic insulating film covering at least the driving circuit, the organic insulating film has a separating groove which divides itself into the inner part and outer part at the periphery of the display area.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 16, 2006
    Inventors: Hiroshi Fujimura, Masumitsu Ino, Mitsuru Asano, Akira Yumoto, Yuichi Iwase
  • Patent number: 6975290
    Abstract: An active matrix type organic EL display apparatus according to the present invention which apparatus uses current writing type pixel circuits is provided with a current control circuit for each of data lines connected to the pixel circuits. The current control circuit supplies part of a data line current to a pixel circuit as a bypass current. The current control circuit handles the bypass current of the data line current represented by (data line current=data current+bypass current). Thereby, the data line driving current can be set greater than the data current flowing through TFTs provided in the pixel circuit, thus reducing luminance data writing time. Also, when the writing time is set unchanged, transistor size of the TFTs provided in the pixel circuit can be reduced.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: December 13, 2005
    Assignee: Sony Corporation
    Inventor: Mitsuru Asano
  • Publication number: 20050264498
    Abstract: A display device having at least a plurality of pixel circuits, connected to signal lines to which data signals in accordance with luminance information are supplied, arranged in a matrix, wherein pixel circuits of odd number columns and even number columns adjacent sandwiching an axis in a column direction parallel to an arrangement direction of the signal lines have a mirror type circuit arrangement symmetric about the axis of the column direction, and there are lines different from the signal lines between signal lines of adjacent pixel circuits.
    Type: Application
    Filed: May 26, 2005
    Publication date: December 1, 2005
    Applicant: Sony Corporation
    Inventor: Mitsuru Asano
  • Publication number: 20050218821
    Abstract: An active matrix type organic EL display apparatus according to the present invention which apparatus uses current writing type pixel circuits is provided with a current control circuit for each of data lines connected to the pixel circuits. The current control circuit supplies part of a data line current to a pixel circuit as a bypass current. The current control circuit handles the bypass current of the data line current represented by (data line current=data current+bypass current). Thereby, the data line driving current can be set greater than the data current flowing through TFTs provided in the pixel circuit, thus reducing luminance data writing time. Also, when the writing time is set unchanged, transistor size of the TFTs provided in the pixel circuit can be reduced.
    Type: Application
    Filed: June 3, 2005
    Publication date: October 6, 2005
    Inventor: Mitsuru Asano