Patents by Inventor Mitsuru Hirakii

Mitsuru Hirakii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6643193
    Abstract: A semiconductor device whose characteristics are highly reliably regulated for circuits whose desired characteristics need to be realized without being affect by unevenness in device characteristics is to be provided. A replica MOS transistor for amperage measurement connected to an external measuring terminal is provided. A delay circuit and other circuits whose desired characteristics are to be realized have a constant current source MOS transistor formed in the same process as the replica MOS transistor, and a trimming voltage vtri is commonly applied to the respective gates of the constant current source MOS transistor and the replica MOS transistor. Trimming data determined on the basis of an amperage measured from the external measuring terminal are stored into a memory means such as an electrically rewritable non-volatile memory or the like. The trimming data determine the trimming voltage vtri.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: November 4, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Takashi Yamaki, Kan Takeuchi, Mitsuru Hirakii, Toshihiro Tanaka, Yutaka Shinagawa, Masamichi Fujito
  • Publication number: 20020027233
    Abstract: A semiconductor device whose characteristics are highly reliably regulated for circuits whose desired characteristics need to be realized without being affect by unevenness in device characteristics is to be provided. A replica MOS transistor for amperage measurement connected to an external measuring terminal is provided. A delay circuit and other circuits whose desired characteristics are to be realized have a constant current source MOS transistor formed in the same process as the replica MOS transistor, and a trimming voltage vtri is commonly applied to the respective gates of the constant current source MOS transistor and the replica MOS transistor. Trimming data determined on the basis of an amperage measured from the external measuring terminal are stored into a memory means such as an electrically rewritable non-volatile memory or the like. The trimming data determine the trimming voltage vtri.
    Type: Application
    Filed: August 28, 2001
    Publication date: March 7, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Takashi Yamaki, Kan Takeuchi, Mitsuru Hirakii, Toshihiro Tanaka, Yutaka Shinagawa, Masamichi Fujito