Patents by Inventor Mitsuru Igarashi

Mitsuru Igarashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7079216
    Abstract: Stacked mother substrates are efficiently separated into individual display device substrate-units by a scribing and breaking method. In a state in which the transported stacked mother substrates PN are held in a raised state, scribe lines SBL1, SBL2 are formed on a first substrate SUB1 and a second substrate SUB2 at the same position. Then, first of all, the stacked mother substrates are broken into strip-like substrates by breaking a periphery and removing a peripheral wastage and, thereafter, the strip-like substrates are broken into display device substrate-units PNL and, thereafter, internal wastages of the respective display device substrate-units PN are separated and removed.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: July 18, 2006
    Assignee: Hitachi Displays., Ltd.
    Inventors: Hisao Yamazaki, Mitsuru Igarashi
  • Patent number: 6836464
    Abstract: In a PNNI routing computation system, each ATM exchange stores a plural types of weight values for computing route for each link and stores a type which a subscriber uses for routing. When PNNI routing is determined in response to call request of a subscriber, the exchange firstly selects possible routes from a call sending node to a call receiving node. Then the exchange determines which type of weight value the subscriber uses for routing by searching a storage in the exchange. Then, the exchange determines one route which total value of the weight values of links along the route is the minimum among the selected routes.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: December 28, 2004
    Assignee: NEC Corporation
    Inventors: Mitsuru Igarashi, Kazusa Murata
  • Publication number: 20040212774
    Abstract: Stacked mother substrates are efficiently separated into individual display device substrate-units by a scribing and breaking method. In a state in which the transported stacked mother substrates PN are held in a raised state, scribe lines SBL1, SBL2 are formed on a first substrate SUB1 and a second substrate SUB2 at the same position. Then, first of all, the stacked mother substrates are broken into strip-like substrates by breaking a periphery and removing a peripheral wastage and, thereafter, the strip-like substrates are broken into display device substrate-units PNL and, thereafter, internal wastages of the respective display device substrate-units PN are separated and removed.
    Type: Application
    Filed: April 28, 2004
    Publication date: October 28, 2004
    Inventors: Hisao Yamazaki, Mitsuru Igarashi
  • Publication number: 20010021184
    Abstract: In a PNNI routing computation system, each ATM exchange stores a plural types of weight values for computing route for each link and stores a type which a subscriber uses for routing. When PNNI routing is determined in response to call request of a subscriber, the exchange firstly selects possible routes from a call sending node to a call receiving node. Then the exchange determines which type of weight value the subscriber uses for routing by searching a storage in the exchange. Then, the exchange determines one route which total value of the weight values of links along the route is the minimum among the selected routes.
    Type: Application
    Filed: March 13, 2001
    Publication date: September 13, 2001
    Applicant: NEC Corporation
    Inventors: Mitsuru Igarashi, Kazusa Murata
  • Patent number: 4381473
    Abstract: In an in-line type electron gun structure including three in-line type electron guns and a plurality of grid electrodes respectively aligned with the electron guns, each sleeve electrode has a length equal to at least 50% of an inner diameter thereof and the inner diameter is gradually increased toward a free end of the sleeve-shaped electrode from a point at about one half of the length thereof. This construction eliminates an auxiliary electrode, thus reducing the cost of manufacturing.
    Type: Grant
    Filed: July 25, 1980
    Date of Patent: April 26, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Satoru Endoh, Mamoru Ikeda, Minoru Yabe, Mitsuru Igarashi, Masaaki Yamauchi
  • Patent number: 4029830
    Abstract: Insulated electric power cables comprising a cured insulating material applied over a conductor and a layer of plastic compound comprising 100 parts by weight of a thermoplastic resin and 5-70 parts by weight of calcium oxide as a moisture-absorbing agent, overlying the insulating material and, optionally, lying between the conductor and the insulating material. The presence of calcium oxide serves to absorb steam before it penetrates into the insulating material through the layer of plastic compound being cured by steam, whereby the cured insulating material is free of microvoids and possess good insulation characteristics.
    Type: Grant
    Filed: May 1, 1975
    Date of Patent: June 14, 1977
    Assignee: The Fujikura Cable Works, Ltd.
    Inventors: Shuji Yamamoto, Setsuya Isshiki, Mitsuru Igarashi