Patents by Inventor Mitsuru Obara

Mitsuru Obara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6633975
    Abstract: A data processing system has the following construction in order to achieve high speed data processing with reduced memory capacity. There are provided a memory to store a plurality of pieces of sequentially input data to be processed, a plurality of processors to execute a series of processings, e.g., Log conversion, MTF correction, gamma correction and binarization in this order to the data to be processed stored in the memory in the order of input, and a state control portion to determine which processing is stagnant by monitoring the progress of a processing by each of said plurality of processors and prohibit a processor executing a processing succeeding to a processing determined as being stagnant from accessing the memory. Processings by the plurality of processors are executed asynchronously and the plurality of processors share the memory.
    Type: Grant
    Filed: November 10, 1999
    Date of Patent: October 14, 2003
    Assignee: Minolta Co., Ltd.
    Inventors: Kenichi Sawada, Atsushi Ishikawa, Mitsuru Obara, Toshiya Shirasawa
  • Publication number: 20030107577
    Abstract: A data processing system has the following construction in order to reduce the memory capacity and the cost. There are provided a plurality of processors to execute to input image data a series of processings including Log conversion, MTF correction, gamma correction and binarization in a prescribed order and a memory to store pixel data to be processed and a state flag to represent the state of processing the pixel data in association with each other. Processings by the plurality of processors are executed asynchronously. The plurality of processors share the memory.
    Type: Application
    Filed: October 26, 1999
    Publication date: June 12, 2003
    Inventors: MITSURU OBARA, KENICHI SAWADA, ATSUSHI ISHIKAWA, KAZUHIRO ISHIGURO
  • Patent number: 6366702
    Abstract: The method and apparatus particularly adapted for reducing the storage capacity of line memories needed for temporarily storing image data for lines until image data for the last line is obtained in digital filtering. Inputted image data are divided into a plurality of blocks, each of which consists of image data obtained from n pixels. The integer n may assume a value of 8, 16, 32, etc. The constituents of one block after another are compressed such that image data consisting of 8 bits per pixel are converted into encoded data consisting of 2 bits per pixel. Data on a dynamic range and an average value for each block are added as a headder to the encoded data. Compressed image data are taken out of a buffer memory after being temporarily stored therein and, together with or separately from compressed image data newly outputted from a compression unit, subjected to image processing such as MTF correction in an arithmetic unit.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: April 2, 2002
    Assignee: Minolta Co., Ltd.
    Inventors: Mitsuru Obara, Atsushi Ishikawa, Kenichi Sawada
  • Patent number: 5970818
    Abstract: A notch alignment apparatus has a unit body (15), which can advance into a carrier (3) through a bottom opening (4) of the carrier (3), for aligning notches (2) formed in the peripheral edges of semiconductor wafers (1), which are contained in the carrier (3) and arrayed in a facing state. The unit body (15) is provided with a rotationally driving shaft (25) having a cylindrical shape, for coming into contact with the peripheral edges of the wafers (1) from below and driving the wafers (1) to rotate all together. A plurality of idle pulleys (26) independent of each other are arranged on one side of the driving shaft (25), for coming into contact with the peripheral edges of the wafers (1) from below. The idle pulleys (26) are supported by a common pulley shaft (27) to be independently and freely rotatable. A stopper or wafer guide (28) is arranged on the other side of the driving shaft (25), for stopping rotation of the wafers (1) by means of contact with the peripheral edges of the wafers (1).
    Type: Grant
    Filed: September 3, 1997
    Date of Patent: October 26, 1999
    Assignee: Tokyo Electron Limited
    Inventors: Hisashi Kikuchi, Mitsuru Obara