Patents by Inventor Mitsuru Sugawara

Mitsuru Sugawara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8391805
    Abstract: According to one embodiment, a semiconductor switch circuit includes a switch section, a decoder section, a DC-DC converter, a driver section, a first filter circuit, a first filter bypass circuit and a first bypass control circuit. The switch section includes an input-output terminal, radio frequency signal terminals, and semiconductor switch elements. The decoder section generates a switch control signal controlling a conduction and a non-conduction state of switch elements. The DC-DC converter generates a first potential. The driver section supplies the first and a second potential to a gate electrode of the switch elements. The first filter circuit is electrically connected between the DC-DC converter and the driver section and outputs the first potential to the driver section. The first filter bypass circuit is electrically connected with the first filter circuit. The first bypass control circuit supplies a first mode signal to the first filter bypass circuit.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: March 5, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshifumi Ishimori, Toshiki Seshita, Mitsuru Sugawara
  • Publication number: 20120139570
    Abstract: According to an embodiment, a semiconductor device includes a switch circuit selecting a signal pathway between a common terminal and one of a plurality of terminals using a plurality of FETs provided in series between the common terminal and each of the terminals. The semiconductor device also includes a test switch including a plurality of FETs connected to the common terminal, an oscillation circuit connected to the common terminal via the test switch, and a detection circuit receiving an output of the oscillation circuit.
    Type: Application
    Filed: September 8, 2011
    Publication date: June 7, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Mitsuru SUGAWARA, Kazunobu KATOU, Toshiki SESHITA
  • Patent number: 8183073
    Abstract: The method of manufacturing the semiconductor device comprises the step of forming quantum dots 16 on a base layer 10 by self-assembled growth; the step of irradiating Sb or GaSb to the surface of the base layer 10 before or in the step of forming quantum dots 16; the step of etching the surfaces of the quantum dots 16 with an As raw material gas to thereby remove an InSb layer 18 containing Sb deposited on the surfaces of the quantum dots 16; and growing a capping layer 22 on the quantum dots 16 with the InSb layer 18 removed.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: May 22, 2012
    Assignees: Fujitsu Limited, The University of Tokyo
    Inventors: Yasuhiko Arakawa, Denis Guimard, Shiro Tsukamoto, Hiroji Ebe, Mitsuru Sugawara
  • Patent number: 8160116
    Abstract: The present invention provides a semiconductor laser including a first conductive type of a lower clad layer 12, an active layer 14 provided on the lower clad layer 12, the active layer 14 including a plurality of quantum dots, and a second conductive type of an upper clad layer 18, the upper clad layer 18 being provided on the active layer 14 so as to have an isolated ridge portion 30 such that W1?Wtop+0.4 ?m where Wtop is the width of a top of the ridge portion 30 and W1 is the width of the ridge portion 30 at a height of 50 nm from a bottom of the ridge portion 30. The present invention also provides a method for manufacturing such a semiconductor laser.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: April 17, 2012
    Assignee: QD Laser Inc.
    Inventors: Tomoyuki Akiyama, Mitsuru Sugawara
  • Publication number: 20120068757
    Abstract: According to one embodiment, a semiconductor switch includes a power supply circuit, a control circuit and a switch circuit. The power supply circuit includes an internal potential generator connected to a power supply, and a first transistor connected between an input and an output of the internal potential generator. The internal potential generator generates a first potential higher than an input potential. The first transistor is turned on when the first potential becomes lower than the input potential and has a threshold voltage being set so as to keep the first potential not lower than the input potential. The control circuit is configured to receive the first potential to output a high-level or low-level control signal. The switch circuit is configured to receive an input of the control signal to switch connection between terminals.
    Type: Application
    Filed: March 14, 2011
    Publication date: March 22, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshiki Seshita, Mitsuru Sugawara
  • Publication number: 20120062222
    Abstract: An aspect of the present disclosure, there is provided a magnetic detection device including a magnetic detection unit including a magnetic sensor unit and a comparison unit, the magnetic sensor unit detecting a magnetic flux density, amplifying the detection signal and outputting an output signal to the comparison unit as a mode selected from one of a first mode and a second mode of which power consumption is lower than that of the first mode, the comparison unit comparing the output signal and a reference voltage as a threshold level which determines magnetic field being formed or not, and outputting a comparison result, a conversion gain control unit outputting a mode signal based on the comparison result to the magnetic sensor unit as the second mode when the mode signal is larger than the threshold level or as the first mode when the mode signal is smaller than the threshold level so as to control the magnetic sensor unit.
    Type: Application
    Filed: August 31, 2011
    Publication date: March 15, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masatoshi Watanabe, Yutaka Yadoumaru, Mitsuru Sugawara, Aikihiro Kawano
  • Publication number: 20120049938
    Abstract: According to one embodiment, a semiconductor switch circuit includes a switch section, a decoder section, a DC-DC converter, a driver section, a first filter circuit, a first filter bypass circuit and a first bypass control circuit. The switch section includes an input-output terminal, radio frequency signal terminals, and semiconductor switch elements. The decoder section generates a switch control signal controlling a conduction and a non-conduction state of switch elements. The DC-DC converter generates a first potential. The driver section supplies the first and a second potential to a gate electrode of the switch elements. The first filter circuit is electrically connected between the DC-DC converter and the driver section and outputs the first potential to the driver section. The first filter bypass circuit is electrically connected with the first filter circuit. The first bypass control circuit supplies a first mode signal to the first filter bypass circuit.
    Type: Application
    Filed: March 21, 2011
    Publication date: March 1, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshifumi Ishimori, Toshiki Seshita, Mitsuru Sugawara
  • Publication number: 20110157685
    Abstract: The present invention is a laser system including a DFB laser 10 emitting a laser light 50, a semiconductor optical amplifier 20 that modulates an intensity of the laser light, and a harmonic generation element 30 that converts the laser light modulated to a visible light 54 that is a harmonic of the laser light. According to the present invention, it is possible to employ the highly efficient harmonic generation element capable of modulating the intensity of the laser light and to reduce power consumption.
    Type: Application
    Filed: July 30, 2009
    Publication date: June 30, 2011
    Inventors: Mitsuru Sugawara, Makoto Usami, Tomoyuki Akiyama
  • Publication number: 20110159822
    Abstract: According to one embodiment, a semiconductor switch includes a voltage generator, a voltage controller, a driver, and a switch unit. The voltage generator generates a negative first potential. The voltage controller controls the first potential according to a terminal switch signal input from an outside. The driver is input the terminal switch signal, and outputs at least one selected from the first potential and the second potential based on the terminal switch signal. The second potential is a power supply voltage or is higher than the power supply voltage. The switch unit is provided on an SOT substrate, switches a connection between an anntena terminal and any one of high frequency terminals based on the output of the driver.
    Type: Application
    Filed: November 23, 2010
    Publication date: June 30, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yugo Kunishi, Toshiki Seshita, Yoshitomo Sagae, Mitsuru Sugawara
  • Publication number: 20110134950
    Abstract: The method of manufacturing the semiconductor device comprises the step of forming quantum dots 16 on a base layer 10 by self-assembled growth; the step of irradiating Sb or GaSb to the surface of the base layer 10 before or in the step of forming quantum dots 16; the step of etching the surfaces of the quantum dots 16 with an As raw material gas to thereby remove an InSb layer 18 containing Sb deposited on the surfaces of the quantum dots 16; and growing a capping layer 22 on the quantum dots 16 with the InSb layer 18 removed.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 9, 2011
    Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Yasuhiko Arakawa, Denis Guimard, Shiro Tsukamoto, Hiroji Ebe, Mitsuru Sugawara
  • Patent number: 7892871
    Abstract: The method of manufacturing the semiconductor device comprises the step of forming quantum dots 16 on a base layer 10 by self-assembled growth; the step of irradiating Sb or GaSb to the surface of the base layer 10 before or in the step of forming quantum dots 16; the step of etching the surfaces of the quantum dots 16 with an As raw material gas to thereby remove an InSb layer 18 containing Sb deposited on the surfaces of the quantum dots 16; and growing a capping layer 22 on the quantum dots 16 with the InSb layer 18 removed.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: February 22, 2011
    Assignees: Fujitsu Limited, The University of Tokyo
    Inventors: Yasuhiko Arakawa, Denis Guimard, Shiro Tsukamoto, Hiroji Ebe, Mitsuru Sugawara
  • Publication number: 20110009171
    Abstract: According to one embodiment, a power supply circuit includes a power switch section, an error amplifier, a wiring and a reset switch section. The error amplifier has one input portion connected to the output terminal, the other input portion and an output portion. The error amplifier outputs the control potential via the output portion to make the resistance of the power switch section high so that potential applied to the one input portion is high to potential applied to the other input portion. The wiring connects a reference terminal to the other input potion. In addition, the reset switch section is configured to isolate the wiring from a baseline potential when the input terminal is supplied with a potential, and to connect the wiring to the baseline potential when the input terminal is not supplied with the potential.
    Type: Application
    Filed: July 8, 2010
    Publication date: January 13, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masatoshi Watanabe, Mitsuru Sugawara
  • Publication number: 20100237842
    Abstract: A switching circuit includes: a switching section including at least one first terminal, a plurality of second terminals, and a switching element configured to connect the first terminal to one of the second terminals; a driver driving the switching element in accordance with an external terminal switching control signal; a DC-to-DC converter, which supplies electric power to the driver, having a first state with a response to a load transient and a second state with the response to a load transient being slower than the first state; and a power controller controlling the DC-to-DC converter to operate with the first state during a first time period corresponding to change in the external terminal switching control signal, and to operate with the second state during a second time period other than the first time period.
    Type: Application
    Filed: March 16, 2010
    Publication date: September 23, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Toshifumi Ishimori, Mitsuru Sugawara, Toshiki Seshita
  • Publication number: 20100195688
    Abstract: The present invention provides a semiconductor laser including a first conductive type of a lower clad layer 12, an active layer 14 provided on the lower clad layer 12, the active layer 14 including a plurality of quantum dots, and a second conductive type of an upper clad layer 18, the upper clad layer 18 being provided on the active layer 14 so as to have an isolated ridge portion 30 such that W1?Wtop+0.4 ?m where Wtop is the width of a top of the ridge portion 30 and W1 is the width of the ridge portion 30 at a height of 50 nm from a bottom of the ridge portion 30. The present invention also provides a method for manufacturing such a semiconductor laser.
    Type: Application
    Filed: June 9, 2008
    Publication date: August 5, 2010
    Inventors: Tomoyuki Akiyama, Mitsuru Sugawara
  • Publication number: 20100097130
    Abstract: A circuit unit is provided. The circuit unit has an intermittent operation circuit. The intermittent operation circuit is set in an operation state and in a stand-by state periodically. An operation mode control unit generates a test mode control signal to designate either an operation test mode or an intermittent operation test mode of the intermittent operation circuit. The operation test mode corresponds to one of a continuous operation or a predetermined time period operation of the intermittent operation circuit. An operation timing generation unit receives the test mode control signal. The operation timing generation unit produces an operation control signal based on the test mode control signal. The operation control signal is outputted to the intermittent operation circuit to operate or wait the intermittent operation circuit.
    Type: Application
    Filed: October 8, 2009
    Publication date: April 22, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kenji Kanamaru, Mitsuru Sugawara, Akihiro Kawano
  • Patent number: 7652179
    Abstract: A gas for plasma reaction comprising a chainlike perfluoroalkyne having 5 or 6 carbon atoms, preferably perfluoro-2-pentyne. This plasma reaction gas is suitable for dry etching for formation of a fine pattern, for plasma CVD for formation of a thin film, and for plasma ashing. The plasma reaction gas is synthesized by contacting a dihydrofluoroalkane compound or a monohydrofluoroalkene compound with a basic compound.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: January 26, 2010
    Assignee: Zeon Corporation
    Inventors: Mitsuru Sugawara, Toshiro Yamada, Tatsuya Sugimoto, Kimiaki Tanaka
  • Patent number: 7449415
    Abstract: A high-purity gas for plasma reaction having an octafluorocyclopentene purity of at least 99.9% by volume based on the total volume of the gas for plasma reaction, wherein the total content of nitrogen gas and oxygen gas, contained as trace gaseous ingredients of the remainder, is not larger than 200 ppm by volume. This high-purity gas for plasma reaction can be produced by (1) a process of distilling crude octafluorocyclopentene in an inert gas of group 0, or (2) a process of distilling crude octafluorocyclopentene into a purity of at least 99.9% by volume, and then, removing an impurity remainder.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: November 11, 2008
    Assignee: Zeon Corporation
    Inventors: Toshinobu Hirayama, Toshiro Yamada, Tatsuya Sugimoto, Mitsuru Sugawara
  • Publication number: 20080139855
    Abstract: A gas for plasma reaction comprising a chainlike perfluoroalkyne having 5 or 6 carbon atoms, preferably perfluoro-2-pentyne. This plasma reaction gas is suitable for dry etching for formation of a fine pattern, for plasma CVD for formation of a thin film, and for plasma ashing. The plasma reaction gas is synthesized by contacting a dihydrofluoroalkane compound or a monohydrofluoroalkene compound with a basic compound.
    Type: Application
    Filed: January 11, 2008
    Publication date: June 12, 2008
    Applicant: Zeon Corporation
    Inventors: Mitsuru Sugawara, Toshiro Yamada, Tatsuya Sugimoto, Kimiaki Tanaka
  • Publication number: 20080073640
    Abstract: The method of manufacturing the semiconductor device comprises the step of forming quantum dots 16 on a base layer 10 by self-assembled growth; the step of irradiating Sb or GaSb to the surface of the base layer 10 before or in the step of forming quantum dots 16; the step of etching the surfaces of the quantum dots 16 with an As raw material gas to thereby remove an InSb layer 18 containing Sb deposited on the surfaces of the quantum dots 16; and growing a capping layer 22 on the quantum dots 16 with the InSb layer 18 removed.
    Type: Application
    Filed: May 15, 2007
    Publication date: March 27, 2008
    Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Yasuhiko Arakawa, Denis Guimard, Shiro Tsukamoto, Hiroji Ebe, Mitsuru Sugawara
  • Patent number: 7341764
    Abstract: A gas for plasma reaction comprising a chainlike perfluoroalkyne having 5 or 6 carbon atoms, preferably perfluoro-2-pentyne. This plasma reaction gas is suitable for dry etching for formation of a fine pattern, for plasma CVD for formation of a thin film, and for plasma ashing. The plasma reaction gas is synthesized by contacting a dihydrofluoroalkane compound or a monohydrofluoroalkene compound with a basic compound.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: March 11, 2008
    Assignee: Zeon Corporation
    Inventors: Mitsuru Sugawara, Toshiro Yamada, Tatsuya Sugimoto, Kimiaki Tanaka