Patents by Inventor Mitsuru Takenaka

Mitsuru Takenaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110233689
    Abstract: There is provided a semiconductor device that includes a III-V Group compound semiconductor having a zinc-blende-type crystal structure, an insulating material being in contact with the (111) plane of the III-V Group compound semiconductor, a plane of the III-V Group compound semiconductor equivalent to the (111) plane, or a plane that has an off angle with respect to the (111) plane or the plane equivalent to the (111) plane, and an MIS-type electrode being in contact with the insulating material and including a metal conductive material.
    Type: Application
    Filed: November 27, 2009
    Publication date: September 29, 2011
    Applicants: SUMITOMO CHEMICAL COMPANY, LIMITED, THE UNIVERSITY OF TOKYO, NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Masahiko Hata, Noboru Fukuhara, Hisashi Yamada, Shinichi Takagi, Masakazu Sugiyama, Mitsuru Takenaka, Tetsuji Yasuda, Noriyuki Miyata, Taro Itatani, Hiroyuki Ishii, Akihiro Ohtake, Jun Nara
  • Publication number: 20110018033
    Abstract: It is an objective of the present invention to form a favorable interface between an oxide layer and a group 3-5 compound semiconductor using a practical and simple method. Provided is a semiconductor wafer comprising a first semiconductor layer that is a group 3-5 compound not containing arsenic and that lattice matches or pseudo-lattice matches with InP; and a second semiconductor layer that is formed to contact the first semiconductor layer, is a group 3-5 compound semiconductor layer that lattice matches or pseudo-lattice matches with InP, and can be selectively oxidized relative to the first semiconductor layer.
    Type: Application
    Filed: March 26, 2009
    Publication date: January 27, 2011
    Applicants: SUMITOMO CHEMICAL COMPANY, LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Mitsuru Takenaka, Shinichi Takagi, Masahiko Hata, Osamu Ichikawa
  • Patent number: 7292746
    Abstract: The present invention provides a set-reset flip-flop operating in an all-optical manner. In this invention, a set pulse is inputted from the setting port. In doing so, only oscillation in set mode is generated at the multi-mode interference portion in a waveguide. As a result, a non-inverting output Q is obtained from the non-inverting output port. This state is then continued even if the set pulse input goes off. Next, a reset pulse is inputted to the resetting port. In doing so, at the multi-mode interference portion, oscillation of light in the set mode is halted, and oscillation in the reset mode occurs. As a result, it is possible to obtain an inverting output Q-bar from the inverting output port. This state is then continued even if the reset pulse goes off.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: November 6, 2007
    Assignee: Japan Science and Technology Agency
    Inventors: Yoshiaki Nakano, Mitsuru Takenaka
  • Publication number: 20040190562
    Abstract: The present invention provides a set-reset flip-flop operating in an all-optical manner. In this invention, a set pulse is inputted from the setting port. In doing so, only oscillation in set mode is generated at the multi-mode interference portion in a waveguide. As a result, a non-inverting output Q is obtained from the non-inverting output port. This state is then continued even if the set pulse input goes off. Next, a reset pulse is inputted to the resetting port. In doing so, at the multi-mode interference portion, oscillation of light in the set mode is halted, and oscillation in the reset mode occurs. As a result, it is possible to obtain an inverting output Q-bar from the inverting output port. This state is then continued even if the reset pulse goes off.
    Type: Application
    Filed: March 12, 2004
    Publication date: September 30, 2004
    Inventors: Yoshiaki Nakano, Mitsuru Takenaka
  • Patent number: 6208795
    Abstract: An optical waveguide isolator for use in an optical communication system is disclosed. The optical waveguide isolator comprises a semiconductive light amplifier structure including a semiconductor substrate of first conductivity type having a surface of a layer to be formed thereon, a first cladding layer of first conductivity type formed on the substrate, an active layer formed on the first cladding layer, a second cladding layer of the second conductivity type opposite to first conductivity type, formed on active layer, a first electrode formed on the surface of the semiconductor substrate opposite to the surface to be formed as a layer, and a second electrode formed on the second cladding layer; the first and the second cladding layers and the active layer form an optical waveguide in which the light wave propagates.
    Type: Grant
    Filed: March 16, 2000
    Date of Patent: March 27, 2001
    Assignee: Sugimura International Patent & Trademark Agency Bureau
    Inventors: Yoshiaki Nakano, Mitsuru Takenaka