Patents by Inventor Mitsuru Tsuboi

Mitsuru Tsuboi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010055310
    Abstract: A signal processing apparatus for assigning channels to a plurality of DSP's to be used comprises a control circuit for controlling the DSP's, a library for storing a plurality of signal processing algorithms, and a channel assignment table. The control circuit, when an assignment designation of a channel and an algorithm for each of the DSP's is received, compares the designated algorithm with the algorithms having been already downloaded to the DSP's based on the table, thereby downloading only an algorithm required to be newly downloaded from the library to the DSP's or between the DSP's and assigning the downloaded algorithm to the received channel. The channel assignment table can fixedly/variably store a relationship between processing positions (time slots) in addition to the relationship between the channels and the DSP's.
    Type: Application
    Filed: August 6, 2001
    Publication date: December 27, 2001
    Inventors: Noboru Kobayashi, Naoji Fujino, Hideaki Kurihara, Mitsuru Tsuboi, Teruyuki Sato, Fumiaki Nishida
  • Publication number: 20010034601
    Abstract: On the basis of parameters representing background noise characteristics and parameters representing voice characteristics of a current frame, a voice activity detector 42 identifies whether the current frame is a non-active voice segment of background noise only or an active voice segment in which background noise has been superimposed on voice. The voice activity detector updates the background-noise characteristic parameters in each frame, irrespective of whether requirements for updating the background-noise characteristic parameters have been satisfied, in an interval of time from start of a steady operation for detection of voice activity to identification of an active voice segment. Further, the voice activity detector 42 relaxes the update requirements of the background-noise characteristic parameters based upon results of voice activity and voice non-activity detection and, when these requirements have been satisfied, updates the background-noise characteristic parameters.
    Type: Application
    Filed: May 17, 2001
    Publication date: October 25, 2001
    Inventors: Kaoru Chujo, Toshiaki Nobumoto, Mitsuru Tsuboi, Naoji Fujino, Noboru Kobayashi
  • Patent number: 5765128
    Abstract: An apparatus synchronizes a voice coder and a voice decoder which are of the vector-coding type in order to prevent a false synchronization even when a signal having the same period as a string of synchronizing bits is inputted. A noise component adding unit adds a noise component to an input voice signal. Therefore, even if the input voice signal has the same period as that of a string of synchronizing bits and is completely periodic, the periodicity of the input voice signal is lost by the added noise component. Based on the input voice signal which is no longer periodic, a vector-coding unit, a quantizing signal vector generating unit, and a code book index transmitting unit generate code book indexes and transmit the generated code book indexes to a voice decoder. Therefore, the voice decoder is prevented from developing a false synchronization.
    Type: Grant
    Filed: October 2, 1995
    Date of Patent: June 9, 1998
    Assignee: Fujitsu Limited
    Inventors: Mitsuru Tsuboi, Naoji Fujino, Noboru Kobayashi, Toshiaki Nobumoto, Toshiyuki Ohta, Yutaka Moriyama, Nobuhide Eguchi, Miki Murakawa
  • Patent number: 5519394
    Abstract: The coder generates code information A.sub.1 -A.sub.N, each representing one of Q quantization points of an input signal, where Q is an integer equal to or less than 2.sup.x and X is a positive number, synthesizes the code information A.sub.1 -A.sub.N into a code H through an operation:H=A.sub.1 Q.sup.N-1 +A.sub.2 Q.sup.N-2 + . . . +A.sub.N-1 Q+A.sub.N,and outputs the code H. The decoder inputs the code H, separates the code H into code information A.sub.1 -A.sub.N through operations with decimal fractions of quotients truncated:A.sub.1 =H/Q.sup.N-1A.sub.2 =(H-A.sub.1 Q.sup.N-1)/Q.sup.N-2A.sub.N-1 =(H-A.sub.1 Q.sup.N-1 -A.sub.2 Q.sup.N-2 - . . . -A.sub.N-2 Q.sup.2)/QA.sub.N =H-A.sub.1 Q.sup.N-1 -A.sub.2 Q.sup.N-2 - . . . -A.sub.N-2 Q.sup.2 -A.sub.N-1 Q,and reproduces an output signal based upon the thus-separated code information A.sub.1 -A.sub.N.
    Type: Grant
    Filed: July 21, 1994
    Date of Patent: May 21, 1996
    Assignee: Fujitsu Limited
    Inventors: Naoshi Matsuo, Naoji Fujino, Mitsuru Tsuboi, Toshiaki Nobumoto, Nobuhide Eguchi
  • Patent number: 5436899
    Abstract: The high performance multiplexed transmission system of this invention is configured by a sound coding unit for coding voice input information by separating it into a core information part for assuring the minimum acceptable sound quality and a supplementary information part discardable in stages per the transmission priorities. There is a silent section detecting unit for detecting silent sections of voice input information. In addition, there is a multiplexing unit for multiplexing only the information synchronizing with the correspondent's coder for the voice channels from which no sound is detected, or first the core information part and second the supplementary information part from the ones with the highest priorities in stages in fixed length frames, for discarding the supplementary information parts, which cannot be multiplexed because of a band deficiency.
    Type: Grant
    Filed: October 12, 1993
    Date of Patent: July 25, 1995
    Assignee: Fujitsu Limited
    Inventors: Naoji Fujino, Mitsuru Tsuboi, Shoji Tominaga, Takao Matsuda, Naomi Nishiyama, Takahiro Aramaki, Ken-ichi Abiru, Toshiaki Nobumoto
  • Patent number: 5313462
    Abstract: The invention provides a synchronism establishing method and apparatus including a plurality of modules having different independent synchronization patterns to be switched wherein the switching transition process having a time length corresponding to the number of protection stages necessary for pull in and protection of synchronism is reduced so small that the presence of such switching transition process can be ignored while assuring similar advantages to those of conventional synchronism establishing apparatus. A master side module delivers a notification of establishment of synchronism thereof to a slave side module. When the slave side module is in a condition wherein synchronism is established, it puts its synchronizing operation into a waiting mode. Even if it thereafter detects a number of abnormal synchronization patterns greater than the number of protection stages, it does not determine a pull out condition and maintains the pulled in phase.
    Type: Grant
    Filed: January 27, 1993
    Date of Patent: May 17, 1994
    Assignee: Fujitsu Limited
    Inventors: Naoji Fujino, Koji Okazaki, Mitsuru Tsuboi, Naoshi Matsuo, Naomi Suga, Toshiaki Nobumoto
  • Patent number: 5140582
    Abstract: A packet switching system having a matrix switch including input packet transfer buses and output packet transfer buses. Transfer buffers or gates are provided at cross points of the input and output packet transfer buses. An input packet is supplied to the matrix switch through a transfer control circuit, and an output packet from the matrix switch is output through the transfer control circuit. The input packet is permitted to be applied to the matrix switch so that each of the output packet transfer buses has only one packet during one packet transfer cycle.
    Type: Grant
    Filed: April 30, 1991
    Date of Patent: August 18, 1992
    Assignee: Fujitsu Limited
    Inventors: Mitsuru Tsuboi, Susumu Tominaga, Akira Takeyama, Satoshi Nojima