Patents by Inventor Mitsuru Ura
Mitsuru Ura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 4651192Abstract: A semiconductor device with a semiconductor element encased in a hollow ceramic package. The portion of the package at which the semiconductor element is disposed is formed from SiC admixed with Be or a compound of Be.Type: GrantFiled: July 3, 1985Date of Patent: March 17, 1987Assignee: Hitachi, Ltd.Inventors: Yasuo Matsushita, Kousuke Nakamura, Mitsuru Ura, Fumiyuki Kobayashi
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Patent number: 4585706Abstract: A semi-conductor device comprising sintered aluminum nitride having a high thermal conductivity, which comprises at least 65% by weight of aluminum nitride, and at least one of beryllium, a beryllium compound, lithium and a lithium compound.Type: GrantFiled: August 26, 1985Date of Patent: April 29, 1986Assignee: Hitachi, Ltd.Inventors: Yukio Takeda, Satoru Ogihara, Mitsuru Ura, Kousuke Nakamura, Tadamichi Asai, Tokio Ohkoshi, Yasuo Matsushita, Kunihiro Maeda
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Patent number: 4561010Abstract: A silicon carbide sintered body comprising silicon carbide as principal constituent, a first component for providing electrical insulating properties to said silicon carbide, said first component comprising at least one of metallic beryllium, beryllium compounds, boron and boron compounds and contained in a total amount of 0.01 to 3.5% by weight calculated as metal, and a second component which can further promote said silicon carbide sinterability provided by said first component and which does not diffuse easily in the particles of said silicon carbide, said second component comprising at least one substance selected from the Group I elements exclusive of hydrogen and francium, Group II elements exclusive of beryllium, radium and mercury, Group III elements exclusive of boron and aluminum, Group IV elements exclusive of carbon, Group V elements, Group VIa elements, Group VIIa elements Group VIII elements exclusive of iron, and compounds thereof, and contained in a total amount of 0.Type: GrantFiled: December 3, 1982Date of Patent: December 24, 1985Assignee: Hitachi, Ltd.Inventors: Satoru Ogihara, Yukio Takeda, Kunihiro Maeda, Kousuke Nakamura, Mitsuru Ura
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Patent number: 4540673Abstract: Sintered aluminum nitride having a high thermal conductivity, which comprises at least 65% by weight of aluminum nitride, and at least one of beryllium, a beryllium compound, lithium and a lithium compound, and a semi-conductor device using the same.Type: GrantFiled: April 29, 1982Date of Patent: September 10, 1985Assignee: Hitachi, Ltd.Inventors: Yukio Takeda, Satoru Ogihara, Mitsuru Ura, Kousuke Nakamura, Tadamichi Asai, Tokio Ohkoshi, Yasuo Matsushita, Kunihiro Maeda
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Patent number: 4517584Abstract: A semiconductor device with a semiconductor element encased in a hollow ceramic package. The portion of the package at which the semiconductor element is disposed is formed from a SiC-based substrate containing Be or a compound of Be with a thin SiO.sub.2 layer being capable of reacting with glass provided thereon and with a glass layer or a thin film circuit on the SiO.sub.2 layer.Type: GrantFiled: December 10, 1982Date of Patent: May 14, 1985Assignee: Hitachi, Ltd.Inventors: Yasuo Matsushita, Kousuke Nakamura, Mitsuru Ura
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Patent number: 4472028Abstract: A liquid crystal display device comprising two substrates being provided in parallel to each other at a given distance and each having a Nesa film on the counterposed surface, at least one of the substrates being transparent, and a liquid crystal being filled between the substrates, the counterposed surfaces of the substrates each being coated with polymer of organosilicone compound having groups reacting with the substrates to a thickness of 300-1,500 .ANG. as an alignment film. The device has thick alignment films and good electrooptical characteristics.Type: GrantFiled: October 5, 1981Date of Patent: September 18, 1984Assignee: Hitachi, Ltd.Inventors: Michio Ooue, Kishiro Iwasaki, Hiroaki Hachino, Mitsuru Ura, Ryoichi Sudo
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Patent number: 4467309Abstract: A high-temperature thermistor comprising, a polycrystalline sintered body consisting essentially of 0.1-8 weight percents of at least one kind selected from the group consisting of Be, BeO, Be.sub.2 C, B, BN, B.sub.2 O.sub.3 and B.sub.4 C which weight percents are calculated as the amount of only Be or B single substance from net amount, the balance SiC, and the inevitable impurities having not more than 2 weight percents of SiO.sub.2, not more than 0.1 weight percent of Al, not more than 0.2 weight percents of Fe, not more than 1 weight percent of Si, and not more than 0.4 weights percents of free carbon, a pair of electrode provided on the surfaces of the sintered body, and lead wires each connected to the respective electrodes, and a method of producing same.Type: GrantFiled: April 26, 1982Date of Patent: August 21, 1984Assignee: Hitachi, Ltd.Inventors: Yasuo Matsushita, Kousuke Nakamura, Mitsuru Ura
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Patent number: 4299873Abstract: A multilayer circuit board obtained by laminating and bonding a plurality of ceramic substrates, each substrate having holes therein and a conductive circuit pattern on at least one surface thereof, and bonding layers between each ceramic substrate, said bonding layers containing an organic or inorganic adhesive and an inorganic filler and having good electrical insulating properties, good thermal conductivity and a larger coefficient of thermal expansion than that of the ceramic substrate shows good thermal conductivity, wiring accuracy and productivity.Type: GrantFiled: April 7, 1980Date of Patent: November 10, 1981Assignee: Hitachi, Ltd.Inventors: Satoru Ogihara, Mitsuru Ura, Yoshihiro Suzuki
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Patent number: 4269899Abstract: A surface coated hard alloy material suitable for use as a material of cutting tools, anti-wear parts or the like in which high wear resistance, oxidation resistance and anti-weld characteristic are the essential requisites, and a method of producing the same. The material has a substrate of cemented carbide, cermet or the like material, a first coating layer of a hafnium compound and directly coating the substrate, a second coating layer of a solid solution of a hafnium compound and a titanium compound and coating the first coating layer, and a third coating layer of a titanium compound and coating the second coating layer. These coating layers are successively formed in a common reaction system, so that the adherence between the coating layers, as well as between the first coating layer and the substrate is remarkably improved.Type: GrantFiled: July 2, 1979Date of Patent: May 26, 1981Assignee: Hitachi Metals, Ltd.Inventors: Moriaki Fuyama, Haruhiko Honda, Mitsuru Ura
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Patent number: 4264682Abstract: A surface coated hard alloy material suitable for use as a material of cutting tools, anti-wear parts or the like in which a high wear resistance, oxidation resistance and anti-weld characteristics are the essential requisites, and a method of producing the same. The material has a substrate made of a cemented carbide, cermet or the like hard material, a first coating layer of a solid solution of a hafnium compound and a titanium compound, and a second coating layer of titanium compound formed on the first coating layer. The coating layers are successively formed in a common reaction system by bringing hafnium tetraiodide and titanium tetraiodide together with a reaction gas into contact with the substrate while the latter is heated by high frequency induction heating, and then introducing only the titanium tetraiodide together with the reaction gas to the substrate, under reduced pressure and in the presence of a glow discharge.Type: GrantFiled: July 2, 1979Date of Patent: April 28, 1981Assignee: Hitachi Metals, Ltd.Inventors: Moriaki Fuyama, Haruhiko Honda, Mitsuru Ura
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Patent number: 4200877Abstract: Disclosed is a temperature-compensated voltage reference diode comprising a breakdown PN junction for establishing the zener breakdown voltage, a PN junction for temperature compensation having a temperature coefficient opposite to that of the breakdown PN junction, the breakdown PN junction and the temperature-compensating PN junction being integrally formed in a semiconductor substrate in a laminated fashion with these PN junctions connected in inverse series with each other, and a semiconductor region interposed between the breakdown PN junction and the temperature compensating PN junction for substantially preventing a transistor action from taking place between the respective PN junctions, wherein the semiconductor region is formed of at least one of a polycrystalline semiconductor layer and a single crystal semiconductor layer having an impurity concentration of higher than about 5.times.10.sup.18 atoms/cm.sup.3.Type: GrantFiled: December 13, 1977Date of Patent: April 29, 1980Assignee: Hitachi, Ltd.Inventors: Takaya Suzuki, Mitsuru Ura, Takuzo Ogawa
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Patent number: 4177114Abstract: A process for silver-plating, which comprises steps of preplating a substrate material in an aqueous preplating solution comprising 10.sup.-5 to 0.02 mole/l of silver and more than 0.01 mole/l of a silver complexing agent such as thiocyanic ions under non-current density, to preplate a sufficient thickness of silver to restrain or substantially prevent substitution plating, and then electroplating the preplated substrate material until a sufficient thickness by supplying an electric current to said material in an aqueous silver plating solution comprising silver ions, thiocyanic ions and a film improving agent.Type: GrantFiled: August 29, 1978Date of Patent: December 4, 1979Assignee: Hitachi, Ltd.Inventors: Yoshihiro Suzuki, Mitsuru Ura, Hiroshi Takahashi
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Patent number: 4164436Abstract: A semiconductor substrate having a single crystal semiconductor layer of one conductivity type exposed to the surface thereof is maintained at a temperature lower than the temperature at which the semiconductors is precipitated from the gas phase. In this state, a gas of a starting material of a semiconductor, a gas containing impurities capable of forming a semiconductor of the other conductivity type and a carrier gas therefore are fed onto the semiconductor substrate. Then, the semiconductor substrate is heated to form an amorphous or polycrystalline semiconductor layer of the other conductivity type on the semiconductor substrate.Type: GrantFiled: July 18, 1978Date of Patent: August 14, 1979Assignee: Hitachi, Ltd.Inventors: Mitsuru Ura, Kenji Miyata, Takaya Suzuki, Takuzo Ogawa
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Low forward voltage drop semiconductor device having polycrystalline layers of different resistivity
Patent number: 4146906Abstract: A semiconductor device has one layer of a diode formed by diffusion of an impurity from a polycrystalline layer portion formed on a region in which the layer is to be formed. The polycrystalline layer portion is composed of two layers, the resistivity of the polycrystalline layer closer to the above-mentioned one layer of the diode being higher than that of the other polycrystalline layer.Type: GrantFiled: January 24, 1977Date of Patent: March 27, 1979Assignee: Hitachi, Ltd.Inventors: Kenji Miyata, Mitsuru Ura, Takuzo Ogawa -
Patent number: 4100310Abstract: In a method of doping impurities comprising mixing a carrier gas, a semiconductor compound gas and a doping gas and leading the mixed gas to a reaction chamber to form a semiconductor layer or a semiconductor oxide layer doped with impurities on a substrate inside the chamber, a part of the doping gas before mixing the doping gas with the other gases is taken and led to a gas analyzer and impurity concentration in the doping gas is monitored to control the impurity concentration in the doping gas.Type: GrantFiled: January 14, 1976Date of Patent: July 11, 1978Assignee: Hitachi, Ltd.Inventors: Mitsuru Ura, Takuzo Ogawa, Takaya Suzuki, Yosuke Inoue, Masayoshi Nomura
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Patent number: 4008485Abstract: A gallium arsenide infrared-light emitting diode in which an Si-doped p-type GaAs layer is formed on an Si-doped n-type GaAs layer which is performed on an n-type GaAs substrate doped with at least one selected from Sn, Se, Te and S.Type: GrantFiled: June 20, 1975Date of Patent: February 15, 1977Assignee: Hitachi, Ltd.Inventors: Tadahiko Miyoshi, Yasutoshi Kurihara, Mitsuru Ura
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Patent number: 3998672Abstract: A recess is formed in one of the principal surfaces of an N-type substrate of GaAs. Through the liquid phase growth technique, a silicon-doped N-type GaAs layer is formed on the one of the principal surfaces and on the surface of the recess and a silicon-doped P-type GaAs layer is continuously formed on the N-type GaAs layer. The liquid-phase-grown GaAs layers are so cut that the PN junction between the layers may be exposed on a plane.Type: GrantFiled: December 30, 1975Date of Patent: December 21, 1976Assignee: Hitachi, Ltd.Inventors: Tadahiko Miyoshi, Yasutoshi Kurihara, Mitsuru Ura