Patents by Inventor Mitsuru Ushijima
Mitsuru Ushijima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8574676Abstract: A substrate processing method includes steps of: arranging a substrate in a chamber; introducing H2 gas at a first flow rate and O2 gas at a second flow rate independently from the H2 gas into a catalyst reaction portion in which catalyst is accommodated, wherein H2O gas produced from the H2 gas and the O2 gas that contact the catalyst is ejected from the catalyst reaction portion toward the substrate; and reducing a flow rate of the O2 gas introduced to the catalyst reaction portion to a third flow rate that is lower than the second flow rate, wherein the steps of introducing the H2 gas and the O2 gas and reducing the flow rate of the O2 gas are repeated in this order at a predetermined repetition frequency, thereby processing the substrate.Type: GrantFiled: November 19, 2009Date of Patent: November 5, 2013Assignees: National University Corporation Nagaoka University of Technology, Tokyo Electron LimitedInventors: Kanji Yasui, Hiroshi Nishiyama, Yasunobu Inoue, Mitsuru Ushijima, Katsuhiko Iwabuchi
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Publication number: 20110247560Abstract: A disclosed substrate processing apparatus comprises a reaction chamber; a substrate supporting portion that is provided in the reaction chamber and configured to support a substrate; and plural catalyst reaction portions that are arranged in the reaction chamber in order to oppose the substrate supporting portion, and configured to produce a reaction gas by allowing a source gas introduced from a gas introduction portion to contact a catalyst and to eject the reaction gas to an inner space of the reaction chamber, thereby processing the substrate supported by the substrate supporting portion with the ejected reaction gas.Type: ApplicationFiled: November 19, 2009Publication date: October 13, 2011Applicants: TOKYO ELECTRON LIMITED, NATIONAL UNIVERSITY CORPORATION NAGAOKA UNIVERSITY OF TECHNOLOGYInventors: Kanji Yasui, Hiroshi Nishiyama, Yasunobu Inoue, Mitsuru Ushijima, Katsuhiko Iwabuchi
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Patent number: 7569124Abstract: In an anodic oxidation apparatus and an anodic oxidation method and a panel for a display device manufactured by them, a large target substrate is treated by a smaller component.Type: GrantFiled: August 25, 2004Date of Patent: August 4, 2009Assignee: Tokyo Electron Limited and Matsushita Electric Works, Ltd.Inventors: Yasushi Yagi, Mitsuru Ushijima, Yoshifumi Watabe, Takuya Komoda, Koichi Aizawa
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Patent number: 7169283Abstract: In an anodization apparatus and an anodization method for electrochemically treating a target substrate by irradiating the target substrate with light, treatment of a large target substrate can be made possible with smaller constituent elements. The electrical contact with the target substrate by a contact member is realized by a plurality of contact members or by the movement of a contact member to change the electrical contact position. The target substrate is manufactured in advance so as to have such a structure that portions thereof to be in contact with the plural contact members are connected to portions of a conductive layer on a treatment part thereof respectively.Type: GrantFiled: January 21, 2003Date of Patent: January 30, 2007Assignee: Tokyo Electron LimitedInventors: Yasushi Yagi, Kazutsugu Aoki, Mitsuru Ushijima
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Patent number: 7118663Abstract: An anodic oxidation apparatus and an anodic oxidation method are provided that enable uniform photoirradiation of a treatment part of a target substrate, thereby realizing enhancement in uniformity of anodic oxidation in the surface of the target substrate. The anodic oxidation apparatus includes: a lamp that emits light; a target substrate holder provided at a position reached by the emitted light and capable of holding the target substrate; a cathode electrode that is provided on the way of the emitted light to reach the target substrate and that has an opening portion to allow light to pass therethrough and has a conductor section not transmitting light; and a vibrating mechanism to periodically vibrate a spatial position of one of the cathode electrode, the lamp, and the target substrate holder.Type: GrantFiled: November 6, 2002Date of Patent: October 10, 2006Assignee: Tokyo Electron LimitedInventors: Yasushi Yagi, Kazutsugu Aoki, Mitsuru Ushijima
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Publication number: 20050077183Abstract: In an anodic oxidation apparatus and an anodic oxidation method and a panel for a display device manufactured by them, a large target substrate is treated by a smaller component.Type: ApplicationFiled: August 25, 2004Publication date: April 14, 2005Inventors: Yasushi Yagi, Mitsuru Ushijima, Yoshifumi Watabe, Takuya Komoda, Koichi Aizawa
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Publication number: 20040089552Abstract: In an anodization apparatus and an anodization method for electrochemically treating a target substrate by irradiating the target substrate with light, treatment of a large target substrate can be made possible with smaller constituent elements. The electrical contact with the target substrate by a contact member is realized by a plurality of contact members or by the movement of a contact member to change the electrical contact position. The target substrate is manufactured in advance so as to have such a structure that portions thereof to be in contact with the plural contact members are connected to portions of a conductive layer on a treatment part thereof respectively.Type: ApplicationFiled: September 12, 2003Publication date: May 13, 2004Inventors: Yasushi Yagi, Kazutsugu Aoki, Mitsuru Ushijima
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Publication number: 20040084317Abstract: An anodic oxidation apparatus and an anodic oxidation method are provided that enable uniform photoirradiation of a treatment part of a target substrate, thereby realizing enhancement in uniformity of anodic oxidation in the surface of the target substrate; The anodic oxidation apparatus includes: a lamp that emits light; a target substrate holder provided at a position reached by the emitted light and capable of holding the target substrate; a cathode electrode that is provided on the way of the emitted light to reach the target substrate and that has an opening portion to allow light to pass therethrough and has a conductor section not transmitting light; and a vibrating mechanism to periodically vibrate a spatial position of one of the cathode electrode, the lamp, and the target substrate holder.Type: ApplicationFiled: September 12, 2003Publication date: May 6, 2004Inventors: Yasushi Yagi, Kazutsugu Aoki, Mitsuru Ushijima
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Patent number: 6378078Abstract: A supervisory circuit for a semiconductor integrated circuit includes a first circuit, a second circuit, inverters, and an EXOR circuit. The first circuit outputs an address signal. The second circuit receives via an address bus the address signal transferred from the first circuit. The inverters hold at least an address signal preceding one transfer period as a past address signal on the address bus. The EXOR circuit compares the past address signal held by the inverters with a current address signal on the address bus, and when the comparison result represents that the past and current address signals are identical, outputs an illicit operation detection signal.Type: GrantFiled: March 18, 1999Date of Patent: April 23, 2002Assignee: NEC CorporationInventor: Mitsuru Ushijima
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Patent number: 5442416Abstract: A resist process system of the present invention includes at least two robots for conveying a wafer, a passage through which the robots can move, plural process units arranged along the passage, and a waiting unit for temporarily holding the wafer which is to be processed. The waiting unit is arranged beside the passage and between the process units and it includes plural compartments partitioned in it.Type: GrantFiled: July 7, 1994Date of Patent: August 15, 1995Assignees: Tokyo Electron Limited, Tokyo Electron Kyushu LimitedInventors: Kiyohisa Tateyama, Masami Akimoto, Mitsuru Ushijima
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Patent number: 5393624Abstract: A method of manufacturing a semiconductor device of this invention relates to a method of manufacturing a semiconductor device with ultra-micropattern electrodes. Light is projected on a resist film, and reflected light from a region on which no semiconductor chip is formed, i.e., a flat region is detected to measure the thickness of the resist film. Based on the measured thickness, at least one of the resist film forming step, the exposing step, and the developing step is controlled, so that the electrodes have a desired width.Type: GrantFiled: August 3, 1992Date of Patent: February 28, 1995Assignee: Tokyo Electron LimitedInventor: Mitsuru Ushijima
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Patent number: 5339128Abstract: A resist process system of the present invention includes at least two robots for conveying a wafer, a passage through which the robots can move, plural process units arranged along the passage, and a waiting unit for temporarily holding the wafer which is to be processed. The waiting unit is arranged beside the passage and between the process units and it includes plural compartments partitioned in it.Type: GrantFiled: March 15, 1993Date of Patent: August 16, 1994Assignees: Tokyo Electron Limited, Tokyo Electron Kyushu LimitedInventors: Kiyohisa Tateyama, Masami Akimoto, Mitsuru Ushijima
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Patent number: 5202716Abstract: A resist process system of the present invention includes at least two robots for conveying a wafer, a passage through which the robots can move, plural process units arranged along the passage, and a waiting unit for temporarily holding the wafer which is to be processed. The waiting unit is arranged beside the passage and between the process units and it includes plural compartments partitioned in it.Type: GrantFiled: June 25, 1992Date of Patent: April 13, 1993Assignees: Tokyo Electron Limited, Tokyo Electron Kyushu LimitedInventors: Kiyohisa Tateyama, Masami Akimoto, Mitsuru Ushijima
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Patent number: 5177514Abstract: The resist-processing system according to the present invention includes at least one processing sections having a plurality of treatment units for performing various kinds of treatments on a semiconductor wafer such as the coating process and baking process, a loading section connected to the processing section for supplying the wafer to the processing section, a vacuum tweezer for carrying the wafer in the loading section so as to transfer the wafer from the loading section to the processing section, a handling robot for receiving the wafer from said loading section and transferring it in the processing section so as to load and unload the wafer to/from each of the treatment units, control means for controlling the operations of the vacuum tweezer and the handling robot in accordance with a predetermined program, and a passage provided in the processing section in such a manner the passage is disposed along with said plurality of treating units.Type: GrantFiled: December 14, 1990Date of Patent: January 5, 1993Assignee: Tokyo Electron LimitedInventors: Mitsuru Ushijima, Masami Akimoto
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Patent number: 5089305Abstract: Disclosed is a coating apparatus for applying a resist or developing solution to a semiconductor wafer. This coating apparatus comprises a plurality of nozzles supplied with various resist from a resist source and each adapted to drip the different solution onto the wafer, a vessel in which the nozzles is kept on stand-by, while maintaining the liquids in a predetermined state in the vicinity of discharge port portions of the nozzles, when the nozzles need not be operated, and a nozzle operating mechanism for selecting one of the nozzles kept on stand-by in the vessel, and transporting the selected nozzle to the location of the wafer, whereby the resist is applied to the wafer by means of only the nozzle transported by the nozzle operating mechanism.Type: GrantFiled: September 20, 1990Date of Patent: February 18, 1992Assignees: Tokyo Electron Limited, Tel Kyushu LimitedInventors: Mitsuru Ushijima, Osamu Hirakawa, Masami Akimoto, Yoshio Kimura, Noriyuki Anai
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Patent number: 5002008Abstract: Disclosed is a coating apparatus for applying a resist or developing solution to a semiconductor wafer. This coating apparatus comprises a plurality of nozzles supplied with various resist from a resist source and each adapted to drip the different solution onto the wafer, a vessel in which the nozzles is kept on stand-by, while maintaining the liquids in a predetermined state in the vicinity of discharge port portions of the nozzles, when the nozzles need not be operated, and a nozzle operating mechanism for selecting one of the nozzles kept on stand-by in the vessel, and transporting the selected nozzle to the location of the wafer, whereby the resist is applied to the wafer by means of only the nozzle transported by the nozzle operating mechanism.Type: GrantFiled: May 26, 1989Date of Patent: March 26, 1991Assignees: Tokyo Electron Limited, Tel Kyushu LimitedInventors: Mitsuru Ushijima, Osamu Hirakawa, Masami Akimoto, Yoshio Kimura, Noriyuki Anai
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Patent number: 4985722Abstract: An apparatus is disclosed which forms a photo-resist film on a substrate surface and/or develops it.Type: GrantFiled: February 10, 1989Date of Patent: January 15, 1991Assignees: Tokyo Electron Limited, Tel Kyushu LimitedInventors: Mitsuru Ushijima, Masami Akimoto