Patents by Inventor Mitsushisa Nakai

Mitsushisa Nakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Wiring board and soldering method therefor
    Publication number: 20030156391
    Abstract: A circuit board comprising a first solder leading land 13a disposed next to a mounting land located rearmost in a direction the circuit board moving during flow soldering of an electronic component, and a second solder leading land 13b disposed behind the first solder leading land 13a against the direction. The present invention provides a circuit board which can effectively prevent solder bridges caused by excessive solder accumulated around leads and lands located in the rearmost position while the electronic component is flow soldered at narrow pitches as is represented by a case with QFPIC. The circuit board of the present invention is suitable for use of lead-free solder, thus contributes to an environment protection.
    Type: Application
    Filed: February 11, 2003
    Publication date: August 21, 2003
    Inventors: Mitsushisa Nakai, Keiichi Kuriyama, Akihiro Kyogoku, Yoshinao Nakamoto, Koji Taniguchi, Hiroaki Higashi