Patents by Inventor Mitsutaka Nagae

Mitsutaka Nagae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12144108
    Abstract: A wiring board includes a substrate, wiring, and a reinforcing part. The substrate is stretchable, and includes a first surface and a second surface located opposite to the first surface. The wiring is located at the first surface side of the substrate. The reinforcing part overlaps the wiring when viewed in a direction normal to the first surface of the substrate. The substrate has a control region and a non-control region. The control region overlaps the reinforcing part. The non-control region does not overlap the reinforcing part. The non-control region is positioned to sandwich the control region in a direction orthogonal to the direction in which the wiring extends.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: November 12, 2024
    Assignee: DAI NIPPON PRINTING CO., LTD.
    Inventors: Naoko Okimoto, Kenichi Ogawa, Mitsutaka Nagae, Makiko Sakata, Toru Miyoshi
  • Patent number: 11744011
    Abstract: A wiring board on which electronic components are mountable includes a stretchable portion having stretchability and having a first surface and a second surface opposite to the first surface, and an interconnection wire electrically connected to the electronic components mounted on the wiring board. The stretchable portion includes first regions lined up in each of a first direction and a second direction, a second region including first portions and second portions, and a third region surrounded by the second region. The first regions overlap the electronic components. The first portion extends from one of two first regions neighboring each other in the first direction to the other thereof. The second portion extends from one of two first regions neighboring each other in the second direction to the other thereof. The second region has a lower modulus of elasticity than the first region. The interconnection wire overlaps the second region.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: August 29, 2023
    Assignee: DAI NIPPON PRINTING CO., LTD.
    Inventors: Kenichi Ogawa, Naoko Okimoto, Mitsutaka Nagae, Makiko Sakata, Toru Miyoshi
  • Patent number: 11653444
    Abstract: A wiring board includes a substrate including a first surface and a second surface located on an opposite side to the first surface, where the substrate has stretchability, an interconnection wire located adjacent to the first surface of the substrate, and a stress relaxation layer located between the first surface of the substrate and the interconnection wire, where the stress relaxation layer has a modulus of elasticity lower than that of the substrate.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: May 16, 2023
    Assignee: DAI NIPPON PRINTING CO., LTD.
    Inventors: Naoko Okimoto, Mitsutaka Nagae, Kenichi Ogawa, Makiko Sakata, Toru Miyoshi
  • Patent number: 11395404
    Abstract: A wiring board includes a first substrate having stretchability, wiring disposed adjacent to a first surface of the first substrate and extending in a first direction, and a stopper disposed adjacent to the first surface or second surface of the first substrate. While stretch length of the wiring board is being increased in the first direction, electrical resistance of the wiring exhibits a first turning point at a first stretch length and tension applied to the wiring board exhibits a second turning point at a second stretch length smaller than the first stretch length. The first turning point is a point at which an increase in electrical resistance per unit stretch length changes. The second turning point is a point at which an increase in tension per unit stretch length changes.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: July 19, 2022
    Assignee: DAI NIPPON PRINTING CO., LTD.
    Inventors: Naoko Okimoto, Kenichi Ogawa, Mitsutaka Nagae, Makiko Sakata, Toru Miyoshi
  • Patent number: 8202771
    Abstract: A manufacturing method of an organic semiconductor device including an organic semiconductor transistor formation process, wherein the process includes: an organic semiconductor layer formation step of using a substrate to form an organic semiconductor layer made of an organic semiconductor material on the substrate; a passivation layer formation step of forming pattern-wise on the organic semiconductor layer a passivation layer having an ability of shielding vacuum ultraviolet light and an organic semiconductor layer patterning step of irradiating vacuum ultraviolet light to the passivation layer and to the organic semiconductor layer to etch the organic semiconductor layer corresponding to a part where the passivation layer is not formed.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: June 19, 2012
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Mitsutaka Nagae, Hironori Kobayashi, Masanao Matsuoka, Hiroyuki Honda