Patents by Inventor Mitsutoshi Kawamoto

Mitsutoshi Kawamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9741493
    Abstract: A component body is obtained by alternately laminating and sintering a plurality of semiconductor ceramic layers formed of a SrTiO3-based grain boundary insulated semiconductor ceramic and a plurality of internal electrode layers. The average grain diameter of crystal grains is 1.0 ?m or less and a coefficient of variation representing variations in a grain diameter of the crystal grains is 30% or less. To prepare the semiconductor ceramic an Sr compound, a Ti compound and a donor compound are weighed in predetermined amounts and mixed/pulverized. A calcined powder is prepared and a dispersant is added with an acceptor compound to the calcined powder. The resulting mixture is wet-mixed and a heat-treated powder is prepared. The heat-treated powder is formed into slurry and subjected to a filter treatment. The filtered slurry is used to prepare a semiconductor ceramic.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: August 22, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Mitsutoshi Kawamoto
  • Publication number: 20160225527
    Abstract: A component body is obtained by alternately laminating and sintering a plurality of semiconductor ceramic layers formed of a SrTiO3-based grain boundary insulated semiconductor ceramic and a plurality of internal electrode layers. The average grain diameter of crystal grains is 1.0 ?m or less and a coefficient of variation representing variations in a grain diameter of the crystal grains is 30% or less. To prepare the semiconductor ceramic an Sr compound, a Ti compound and a donor compound are weighed in predetermined amounts and mixed/pulverized. A calcined powder is prepared and a dispersant is added with an acceptor compound to the calcined powder. The resulting mixture is wet-mixed and a heat-treated powder is prepared. The heat-treated powder is formed into slurry and subjected to a filter treatment. The filtered slurry is used to prepare a semiconductor ceramic.
    Type: Application
    Filed: April 6, 2016
    Publication date: August 4, 2016
    Inventor: MITSUTOSHI KAWAMOTO
  • Patent number: 9343522
    Abstract: A ceramic powder for use in a grain boundary insulated semiconductor ceramic that has an excellent ESD withstanding voltage, a semiconductor ceramic capacitor using the ceramic powder, and a manufacturing method therefor. The ceramic powder for use in a SrTiO3 based grain boundary insulated semiconductor ceramic has a specific surface area of 4.0 m2/g or more and 8.0 m2/g or less, and a cumulative 90% grain size D90 of 1.2 ?m or less.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: May 17, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Mitsutoshi Kawamoto, Atsushi Sano, Tatsuya Ishikawa, Yasutomo Kobayashi, Yoshihiro Fujita, Yuki Kimura, Yuichi Kusano
  • Patent number: 9153643
    Abstract: A semiconductor ceramic contains a donor element solid-solved in crystal grains of a SrTiO3-based compound, and an acceptor element in a grain boundary layer. The number of tetravalent acceptor elements is 1×1017/g or more, as determined from an electron spin resonance absorption spectrum. A mixture of a calcined powder and an acceptor compound is pulverized to a specific surface area of 5.0 to 7.5 m2/g before mixing with a binder. Semiconductor ceramic layers having a varistor function are formed by using the semiconductor ceramic forming a highly reliable capacitor which can suppress characteristics variations to stably obtain good electrical characteristics.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: October 6, 2015
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Mitsutoshi Kawamoto
  • Patent number: 9105603
    Abstract: A semiconductor ceramic having a compounding molar ratio m between a Sr site and a Ti site that satisfies 1.000 ?m?1.020, has a donor element present as a solid solution in crystal grains, has an acceptor element present in a grain boundary layer in the range of 0.5 mol or less with respect to 100 mol of the Ti element, contains a Zr element in the range of 0.15 mol or more and 3.0 mol or less with respect to 100 mol of the Ti element, and has the crystal grains of 1.5 ?m or less in average grain size.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: August 11, 2015
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Mitsutoshi Kawamoto
  • Publication number: 20140210048
    Abstract: A semiconductor ceramic having a compounding molar ratio m between a Sr site and a Ti site that satisfies 1.000?m?1.020, has a donor element present as a solid solution in crystal grains, has an acceptor element present in a grain boundary layer in the range of 0.5 mol or less with respect to 100 mol of the Ti element, contains a Zr element in the range of 0.15 mol or more and 3.0 mol or less with respect to 100 mol of the Ti element, and has the crystal grains of 1.5 ?m or less in average grain size.
    Type: Application
    Filed: March 28, 2014
    Publication date: July 31, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Mitsutoshi Kawamoto
  • Publication number: 20140091432
    Abstract: A ceramic powder for use in a grain boundary insulated semiconductor ceramic that has an excellent ESD withstanding voltage, a semiconductor ceramic capacitor using the ceramic powder, and a manufacturing method therefor. The ceramic powder for use in a SrTiO3 based grain boundary insulated semiconductor ceramic has a specific surface area of 4.0 m2/g or more and 8.0 m2/g or less, and a cumulative 90% grain size D90 of 1.2 ?m or less.
    Type: Application
    Filed: December 9, 2013
    Publication date: April 3, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Mitsutoshi Kawamoto, Atsushi Sano, Tatsuya Ishikawa, Yasutomo Kobayashi, Yoshihiro Fujita, Yuki Kimura, Yuichi Kusano
  • Patent number: 8654506
    Abstract: A laminate type semiconductor ceramic capacitor with a varistor function is achieved which allows for an improvement in product yield while ensuring such insulation performance that can withstand practical use, and is suitable for mass production with a favorable ESD withstanding voltage. The semiconductor ceramic forming the semiconductor ceramic layers has a compounding molar ratio m between the Sr site and the Ti site of 0.990?m<1.000, has a donor element such as La present as a solid solution in crystal grains, has an acceptor element such as Mn present in a grain boundary layer in the range of 0.5 mol or less (preferably 0.3 mol to 0.5 mol) with respect to 100 mol of the Ti element, and has the crystal grains with an average grain size of 1.5 ?m or less.
    Type: Grant
    Filed: July 20, 2011
    Date of Patent: February 18, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Mitsutoshi Kawamoto
  • Publication number: 20130234293
    Abstract: A semiconductor ceramic contains a donor element solid-solved in crystal grains of a SrTiO3-based compound, and an acceptor element in a grain boundary layer. The number of tetravalent acceptor elements is 1×1017/g or more, as determined from an electron spin resonance absorption spectrum. A mixture of a calcined powder and an acceptor compound is pulverized to a specific surface area of 5.0 to 7.5 m2/g before mixing with a binder. Semiconductor ceramic layers having a varistor function are formed by using the semiconductor ceramic forming a highly reliable capacitor which can suppress characteristics variations to stably obtain good electrical characteristics.
    Type: Application
    Filed: April 30, 2013
    Publication date: September 12, 2013
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Mitsutoshi Kawamoto
  • Publication number: 20120019977
    Abstract: A laminate type semiconductor ceramic capacitor with a varistor function is achieved which allows for an improvement in product yield while ensuring such insulation performance that can withstand practical use, and is suitable for mass production with a favorable ESD withstanding voltage. The semiconductor ceramic forming the semiconductor ceramic layers has a compounding molar ratio m between the Sr site and the Ti site of 0.990?m<1.000, has a donor element such as La present as a solid solution in crystal grains, has an acceptor element such as Mn present in a grain boundary layer in the range of 0.5 mol or less (preferably 0.3 mol to 0.5 mol) with respect to 100 mol of the Ti element, and has the crystal grains with an average grain size of 1.5 ?m or less.
    Type: Application
    Filed: July 20, 2011
    Publication date: January 26, 2012
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Mitsutoshi Kawamoto
  • Patent number: 8040658
    Abstract: A SrTiO3-based grain boundary insulation type semiconductor ceramic contains a donor element in solid solution in crystal grains, an acceptor element at least in crystal grain boundaries, an integral width of (222) face of the crystal face of 0.500° or less, and an average powder grain size of crystal grains of 1.0 ?m or less. A semiconductor ceramic is obtained by firing this ceramic, and a monolithic semiconductor ceramic capacitor is obtained by using the semiconductor ceramic. The SrTiO3-based grain boundary insulation type semiconductor ceramic powder has a large apparent relative dielectric constant ?rAPP of 5,000 or more even when the average ceramic grain size of crystal grains is 1.0 ?m or less and which has an excellent insulating property. The monolithic semiconductor ceramic capacitor is capable of having a large capacity through reduction in thickness and multilayering.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: October 18, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Mitsutoshi Kawamoto
  • Patent number: 7990678
    Abstract: A semiconductor ceramic has a mixing molar ratio m between the Sr site and the Ti site satisfying the relationship 1.000?m<1.020, a donor element in an amount of 0.8 to 2.0 moles relative to 100 moles of the Ti element dissolved in the Sr site to form a solid solution, the donor element having a higher valency than the Sr element, a transition metal element, such as Mn, incorporated in an amount of 0.3 to 1.0 mole relative to 100 moles of the Ti element so as to be segregated in grain boundaries, and an average grain size of crystal grains is 1.0 ?m or less.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: August 2, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Mitsutoshi Kawamoto, Shinsuke Tani
  • Patent number: 7872854
    Abstract: A semiconductor ceramic comprising a donor element within the range of 0.8 to 2.0 mol relative to 100 mol of Ti element contained as a solid solution with crystal grains, a first acceptor element in an amount less than the amount of the donor element is contained as a solid solution with the crystal grains, a second acceptor element within the range of 0.3 to 1.0 mol relative to 100 mol of a Ti element is present in crystal grain boundaries, and the average grain size of the crystal grains is 1.0 ?m or less. A monolithic semiconductor ceramic capacitor is obtained by using this semiconductor ceramic. To form the semiconductor ceramic, in a first firing treatment to conduct reduction firing, a cooling treatment is conducted while the oxygen partial pressure at the time of starting the cooling is set at 1.0×104 times or more the oxygen partial pressure in the firing process.
    Type: Grant
    Filed: March 3, 2008
    Date of Patent: January 18, 2011
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Mitsutoshi Kawamoto
  • Publication number: 20100103587
    Abstract: A SrTiO3-based grain boundary insulation type semiconductor ceramic contains a donor element in solid solution in crystal grains, an acceptor element at least in crystal grain boundaries, an integral width of (222) face of the crystal face of 0.500° or less, and an average powder grain size of crystal grains of 1.0 ?m or less. A semiconductor ceramic is obtained by firing this ceramic, and a monolithic semiconductor ceramic capacitor is obtained by using the semiconductor ceramic. The SrTiO3-based grain boundary insulation type semiconductor ceramic powder has a large apparent relative dielectric constant ?rAPP of 5,000 or more even when the average ceramic grain size of crystal grains is 1.0 ?m or less and which has an excellent insulating property. The monolithic semiconductor ceramic capacitor is capable of having a large capacity through reduction in thickness and multilayering.
    Type: Application
    Filed: December 22, 2009
    Publication date: April 29, 2010
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Mitsutoshi Kawamoto
  • Patent number: 7583493
    Abstract: A monolithic semiconductor ceramic capacitor includes semiconductor ceramic layers made of a semiconductor ceramic having a Sr site and a Ti site. The semiconductor ceramic satisfies the inequality 1.000<m?1.020, wherein m represents the molar ratio of the Sr site to the Ti site. The semiconductor ceramic contains crystal grains and has grain boundary layers. The crystal grains contain a donor element such as La or Sm in the form of a solid solution. The grain boundary layers contain an acceptor element such as Mn, Co, Ni or Cr. The amount of the acceptor element therein is equal to or less than 0.5 mol (preferably 0.3 to 0.5 mol) per 100 mol of Ti. The crystal grains have an average size of 1.0 ?m or less (preferably 0.5 to 0.8 ?m). Therefore, the monolithic semiconductor ceramic capacitor has good electrical properties, good resistivity, good dielectric strength, and high reliability and is suitable for thin or compact apparatuses.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: September 1, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shinsuke Tani, Mitsutoshi Kawamoto
  • Publication number: 20080248286
    Abstract: A semiconductor ceramic has a mixing molar ratio m between the Sr site and the Ti site satisfying the relationship 1.000?m<1.020, a donor element in an amount of 0.8 to 2.0 moles relative to 100 moles of the Ti element dissolved in the Sr site to form a solid solution, the donor element having a higher valency than the Sr element, a transition metal element, such as Mn, incorporated in an amount of 0.3 to 1.0 mole relative to 100 moles of the Ti element so as to be segregated in grain boundaries, and an average grain size of crystal grains is 1.0 ?m or less.
    Type: Application
    Filed: June 24, 2008
    Publication date: October 9, 2008
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Mitsutoshi Kawamoto, Shinsuke Tani
  • Publication number: 20080186655
    Abstract: A semiconductor ceramic comprising a donor element within the range of 0.8 to 2.0 mol relative to 100 mol of Ti element contained as a solid solution with crystal grains, a first acceptor element in an amount less than the amount of the donor element is contained as a solid solution with the crystal grains, a second acceptor element within the range of 0.3 to 1.0 mol relative to 100 mol of a Ti element is present in crystal grain boundaries, and the average grain size of the crystal grains is 1.0 ?m or less. A monolithic semiconductor ceramic capacitor is obtained by using this semiconductor ceramic. To form the semiconductor ceramic, in a first firing treatment to conduct reduction firing, a cooling treatment is conducted while the oxygen partial pressure at the time of starting the cooling is set at 1.0×104 times or more the oxygen partial pressure in the firing process.
    Type: Application
    Filed: March 3, 2008
    Publication date: August 7, 2008
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: MITSUTOSHI KAWAMOTO
  • Publication number: 20080117561
    Abstract: A monolithic semiconductor ceramic capacitor includes semiconductor ceramic layers made of a semiconductor ceramic having a Sr site and a Ti site. The semiconductor ceramic satisfies the inequality 1.000<m?1.020, wherein m represents the molar ratio of the Sr site to the Ti site. The semiconductor ceramic contains crystal grains and has grain boundary layers. The crystal grains contain a donor element such as La or Sm in the form of a solid solution. The grain boundary layers contain an acceptor element such as Mn, Co, Ni or Cr. The amount of the acceptor element therein is equal to or less than 0.5 mol (preferably 0.3 to 0.5 mol) per 100 mol of Ti. The crystal grains have an average size of 1.0 ?m or less (preferably 0.5 to 0.8 ?m). Therefore, the monolithic semiconductor ceramic capacitor has good electrical properties, good resistivity, good dielectric strength, and high reliability and is suitable for thin or compact apparatuses.
    Type: Application
    Filed: February 1, 2008
    Publication date: May 22, 2008
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinsuke TANI, Mitsutoshi KAWAMOTO
  • Patent number: 6984355
    Abstract: A BaTiO3-type semiconducting ceramic material which has undergone firing in a reducing atmosphere and re-oxidation, wherein the relative density of the ceramic material after sintering is about 85–90%. A process for producing the semiconducting ceramic material of the present invention and a thermistor containing the semiconducting ceramic material are also disclosed.
    Type: Grant
    Filed: September 18, 2002
    Date of Patent: January 10, 2006
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hideaki Niimi, Akira Ando, Mitsutoshi Kawamoto, Masahiro Kodama
  • Patent number: 6911893
    Abstract: A ceramic electronic component includes a component body having semiconductive ceramic layers and internal electrodes. The semiconductive ceramic layers and the internal electrodes are alternately laminated. The semiconductive ceramic layers have a relative density of about 90% or less and contain no sintering additives. The component body is provided with an external electrode on each side thereof. The ceramic electronic component has a low resistance and a high withstand voltage.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: June 28, 2005
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masahiro Kodama, Atsushi Kishimoto, Mitsutoshi Kawamoto, Hideaki Niimi, Akira Ando