Abstract: A PLL circuit includes a phase comparator, a charge pump 20, a loop filter 30, a voltage controlled oscillator 40, a frequency divider, and a phase compensator 70. The loop filter 30 includes a resistor 31, a first capacitance element 32, and a second capacitance element 33. The phase compensator 70 is provided in parallel to the charge pump 20 and adds a differentiation term to an open-loop transfer function. The phase compensator 70 includes a buffer 71 receiving a phase difference signal output from the phase comparator and a third capacitance element 72 provided between an output terminal of the buffer 71 and an input terminal of the loop filter 30.

Abstract: A PLL circuit includes a phase comparator, a charge pump 20, a loop filter 30, a voltage controlled oscillator 40, a frequency divider, and a phase compensator 70. The loop filter 30 includes a resistor 31, a first capacitance element 32, and a second capacitance element 33. The phase compensator 70 is provided in parallel to the charge pump 20 and adds a differentiation term to an open-loop transfer function. The phase compensator 70 includes a buffer 71 receiving a phase difference signal output from the phase comparator and a third capacitance element 72 provided between an output terminal of the buffer 71 and an input terminal of the loop filter 30.

Abstract: In a conventional sensor signal detection device, an amplifier and an anti-alias analogue filter are essential for AD conversion of a small sensor output signal. The present application provides a sensor signal detection device that inputs an electric signal output from a sensor to a commercially available AD converter directly or via a means for converting the electric signal into voltage, outputs the electric signal via a digital filter, and realizes sufficient resolution and noise characteristics without using an amplifier and an analogue filter which have conventionally been considered to be essential, by devising conditions, etc., of an AD conversion clock and digital filter.

Abstract: The present application provides a high-efficiency low-distortion power output circuit and a high-frequency low-distortion power output circuit including a modulator, these power output circuits being configured so that an input digital value can be directly connected to an antenna. In the power output circuit, one ends of a plurality of physical elements are commonly connected to an output terminal. The other ends of the physical elements are each switchably connected to a first or second reference voltage source via a corresponding one of switching elements. This circuit is characterized by having a switch control circuit. The switch control circuit performs such control that a predetermined number of switching elements are alternately operated while the remaining number of switching elements are connected to any of the reference voltage sources or a switching element configured for interconnection is added.

Abstract: [Problem] To shorten the measurement time, while maintaining the measurement precision, for a data converter of delta-sigma system. [Solution] A measurement method of the present embodiment is a measurement method for a delta-sigma type of data converter that performs a data conversion between an analog signal and a digital signal.

Abstract: The present application pertains to a circuit such that a capacitor within an IC or LSI can be switched by means of switch. The circuit has a plurality of circuits resulting from one end of capacitor that uses the wiring in an LSI being connected to a switch configured from a MOS transistor, and is characterized by the direction of the long sides (fingers) of the electrode of the capacitor being the same direction as that of the long side of the gate of the MOS transistor, and the repetition pitch when arranging a plurality thereof being identical to each other or an integer multiple of another.

Abstract: [Problem] To shorten the measurement time, while maintaining the measurement precision, for a data converter of delta-sigma system. [Solution] A measurement method of the present embodiment is a measurement method for a delta-sigma type of data converter that performs a data conversion between an analog signal and a digital signal.

Abstract: The purpose of the present invention is to provide a circuit that generates a reference voltage with little electrical power consumption, and that has the similar as conventional circuits. A bandgap reference circuit that, to generate an output voltage, adds a voltage proportional to a differential voltage when currents having different current densities are applied to a semiconductor junction, and a voltage proportional to a forward voltage occurring in a semiconductor junction, wherein the bandgap reference circuit is characterized in that the “voltage proportional to the differential voltage” is generated by a first tunneling current element to which the differential voltage is applied, circuits connected to a second tunneling current element or a serial circuit of second tunneling current elements, and a means to apply, to the second tunneling current element, a current proportional to the current applied to the first tunneling current element.

Abstract: In an active hybrid transformer circuit connected to both transmit and receive sides, a current driver is connected to a transmission path circuit through a common connection point of a load resistor and a replica resistor while a replica driver is connected to the replica resistor of which another connection point is directly connected to the receive side. The replica driver may be formed by a DAC of a current output type. A current ratio of the replica driver and the current driver is selected at a predetermined value so as to prevent a transmit signal from leaking into the receive side.

Abstract: In an active hybrid transformer circuit connected to both transmit and receive sides, a current driver is connected to a transmission path circuit through a common connection point of a load resistor and a replica resistor while a replica driver is connected to the replica resistor of which another connection point is directly connected to the receive side. The replica driver may be formed by a DAC of a current output type. A current ratio of the replica driver and the current driver is selected at a predetermined value so as to prevent a transmit signal from leaking into the receive side.

Abstract: A voltage reference generating circuit for providing voltage references substantially less than the typical 1300 mV, with a controllable thermal coefficient. By forcing equal-valued currents through two semiconductor junctions having disparate junction areas, a voltage differential is developed, as is a current proportional to the voltage differential. The voltage differential, and a current proportional to the voltage differential, have positive thermal coefficients. A third semiconductor junction is biased from a third current source and bridged by a resistor pair so as to synthesize a Thevenin-equivalent voltage equivalent series resistance. The equivalent voltage has a negative thermal coefficient. By forcing a current that is equal to the proportional current through the equivalent resistance, a reference voltage, equal to the sum of the Thevenin-equivalent voltage plus the voltage drop across the Thevenin-equivalent resistance, is created.

Abstract: A semiconductor integrated circuit device includes a variable current source 2. This device further includes a control circuit 1, 10 causing the current source to change the value of the current produced therefrom in response to a set of control signals, and a shift register 13 serially receiving control data and produces the set of control signals in a parallel form.

Abstract: A current switch apparatus includes a bipolar transistor controlled by a reference voltage, a MOS transistor controlled by a logic signal, and a constant current source connected to the bipolar transistor and the MOS transistor.

Abstract: A signal input circuit having a CMOS inverter for receiving an input signal of a TTL level is disclosed. This circuit includes a first transistor of one channel type connected between a first power terminal and an output terminal and having a gate connected to an input terminal, a second transistor of an opposite channel type connected between a second power terminal and the output terminal and having a gate connected to the input terminal, and a current gain control circuit coupled to the first transistor for controlling the current gain of the first transistor to a first value when a power voltage is at a first level and to a second value when the power voltage is at a second level.

Abstract: A serial-to-parallel converter circuit includes a reduced number of gate circuits necessary to configure the circuit. In the converter, each of the register blocks is constituted with an R-S flip-flop circuit including two NAND gates and an NAND gate to select the flip-flop circuit. A decoder selects one of the register blocks according to an accumulation value of serial clocks received by a counter, thereby setting data received via a data input terminal to the selected register block.

Abstract: A current switching circuit includes a constant current source, a first transistor, a first resistor, second and third transistors, a selecting means, and a second resistor. The constant current source supplies a constant current. The first transistor is connected in series with the constant current source and has a base biased by one terminal of a power supply. The first resistor is connected between the first transistor and the other terminal of the power supply. The second and third transistors have collector currents as output currents and are rendered conductive by applying an output voltage of the first transistor to bases of the second and third transistors. The selecting means selectively applies the output voltage of the first transistor to the bases of the second and third transistors. The second resistor is connected between the other terminal of the power supply and a common connection point between emitters of the first and second transistors.

Abstract: A multi-level logic input circuit is composed of a first and a second resistor, a first polarity current mirror circuit whose input is connected to the first resistor and which has a plurality of output nodes, and a second polarity current mirror circuit whose input is connected to the second resistor and which has a plurality of output nodes. The output nodes of the first polarity current mirror circuit are connected correspondingly with the output nodes of the second polarity current mirror circuit. The output nodes are led out as a plurality of output terminals. At least one of the output nodes of each of the current mirror circuits has a current ratio different from that in all the remaining output nodes thereof. The multi-level logic input circuit is simple in its configuration, and it enables to realize multi-level inputs with small current consumption.

Abstract: A differential amplifying circuit includes two transistors, which are connected at collectors respectively to first terminals of two load resistors and at emitters respectively to a constant current source. An emitter follower transistor is commonly connected at a collector to second terminals of the two resistors and to a positive terminal of a direct current power supply, and at an emitter to a base of one of the two transistors. An input signal is supplied to the base of the emitter follower transistor and then supplied to the base of the transistor which is connected therewith. A differential output is picked up at the collectors of the two transistors. In this circuit, the emitter follower transistor is biased by the constant current source which also biases the two transistors of the differential amplifying circuit.

Abstract: A switching transistor for driving an inductive load is switched on and off by a switching signal of a PWM signal or a signal equivalent to the PWM Signal. A frequency band of impulse noise components of the switching signal is above a frequency band used in an apparatus including the inductive load.

Abstract: An amplifying circuit has a plurality of first signal input circuits for multi-channel input, a signal output circuit receptive commonly of outputs of these signal input circuits, and a switching circuit for selecting one of the first signal input circuits. A second signal input circuit has an input terminal held at a fixed potential and an output terminal connected to the signal output circuit and is operative during a selecting transient period of the plurality of first signal input circuits.