Abstract: A MASH type sigma delta AD converter includes a modulator, an analog filter filtering an extraction signal obtained by extracting a probe signal and an quantization error generated in a quantizer within a sigma delta modulator, a low speed AD converter performing an AD conversion of an output signal of the analog filter, a first adaptive filter searching for a transfer function of the sigma delta modulator, a second adaptive filter searching for a transfer function from an output of the modulator to the low speed AD converter via the analog filter, and a noise cancellation circuit cancelling the probe signal and the quantization error included in an output signal of the quantizer using the search results by the first and second adaptive filters.

Abstract: A modulator includes an analog integrator including an analog circuit and a quantizer quantizing its output signal. An external input signal is input thereto. A modulator is coupled to the latter stage of the modulator, and includes a quantizer. A probe signal generation circuit injects a probe signal to the modulator. An adaptive filter searches for a transfer function of the modulator by observing an output signal of the quantizer in accordance with a probe signal. Another adaptive filter searches for a transfer function of the modulator by observing an output signal of the quantizer in accordance with the probe signal. A noise cancel circuit cancels a quantization error generated by the quantizer using search results of the adaptive filters.

Abstract: A MASH type sigma delta AD converter includes a modulator, an analog filter filtering an extraction signal obtained by extracting a probe signal and an quantization error generated in a quantizer within a sigma delta modulator, a low speed AD converter performing an AD conversion of an output signal of the analog filter, a first adaptive filter searching for a transfer function of the sigma delta modulator, a second adaptive filter searching for a transfer function from an output of the modulator to the low speed AD converter via the analog filter, and a noise cancellation circuit cancelling the probe signal and the quantization error included in an output signal of the quantizer using the search results by the first and second adaptive filters.

Abstract: There is a need for high-order frequency measurement without greatly increasing consumption currents and chip die sizes. A semiconductor device includes: an electric power measuring portion that performs electric power measurement; a high-order frequency measuring portion that performs high-order frequency measurement; and a clock controller that supplies an electric power measuring portion with a first clock signal at a first sampling frequency and supplies a high-order frequency measuring portion with a second clock signal at a second sampling frequency. The second sampling frequency is higher than the first sampling frequency.

Abstract: A modulator includes an analog integrator including an analog circuit and a quantizer quantizing its output signal. An external input signal is input thereto. A modulator is coupled to the latter stage of the modulator, and includes a quantizer. A probe signal generation circuit injects a probe signal to the modulator. An adaptive filter searches for a transfer function of the modulator by observing an output signal of the quantizer in accordance with a probe signal. Another adaptive filter searches for a transfer function of the modulator by observing an output signal of the quantizer in accordance with the probe signal. A noise cancel circuit cancels a quantization error generated by the quantizer using search results of the adaptive filters.

Abstract: There is a need for high-order frequency measurement without greatly increasing consumption currents and chip die sizes. A semiconductor device includes: an electric power measuring portion that performs electric power measurement; a high-order frequency measuring portion that performs high-order frequency measurement; and a clock controller that supplies an electric power measuring portion with a first clock signal at a first sampling frequency and supplies a high-order frequency measuring portion with a second clock signal at a second sampling frequency. The second sampling frequency is higher than the first sampling frequency.

Abstract: A reference voltage generating circuit including a bandgap reference circuit generating a bandgap reference voltage, and a filter circuit smoothing the bandgap reference voltage. The bandgap reference circuit is configured to generate the bandgap reference voltage having a first voltage value when a clock signal is in a first logic level, and to generate the bandgap reference voltage having a second voltage value when the clock signal is in a second logic level. The filter circuit includes a first capacitive element charged with the bandgap reference voltage having the first voltage value in the first clock cycle, a second capacitive element charged with the bandgap reference voltage having the second voltage value in the first clock cycle, a third capacitive element charged with the bandgap reference voltage, and a fourth capacitive element.

Abstract: A reference voltage generating circuit including a bandgap reference circuit generating a bandgap reference voltage, and a filter circuit smoothing the bandgap reference voltage. The bandgap reference circuit is configured to generate the bandgap reference voltage having a first voltage value when a clock signal is in a first logic level, and to generate the bandgap reference voltage having a second voltage value when the clock signal is in a second logic level. The filter circuit includes a first capacitive element charged with the bandgap reference voltage having the first voltage value in the first clock cycle, a second capacitive element charged with the bandgap reference voltage having the second voltage value in the first clock cycle, a third capacitive element charged with the bandgap reference voltage, and a fourth capacitive element.

Abstract: A reference voltage generating circuit with extremely low temperature dependence is provided. The reference voltage generating circuit includes a BGR circuit which generates a bandgap reference voltage; a bandgap current generating circuit which generates a bandgap current according to the bandgap reference voltage; a PTAT current generating circuit which generates a current proportional to the absolute temperature; and a linear approximate correction current generating circuit which compares the current generated by the PTAT current generating circuit and the bandgap current to generate a correction current, and the BGR circuit adds, to the bandgap reference voltage, a correction voltage generated based on the correction current.

Abstract: A BGR circuit controls a switch circuit in synchronization with a clock signal from a control signal generating circuit and an inverted signal thereof, and thereby, alternately switches between a differential input terminal receiving a voltage VIM and a differential input terminal receiving a voltage VIP. An LPF circuit includes capacitive elements, a switch connected between an input node and each capacitive element, and a switch connected between an output node and each capacitive element. The LPF circuit controls ON/OFF of the switches in synchronization with a clock signal CLK, and thereby, calculates a moving average value of an output voltage of the BGR circuit in the most recent one clock cycle.

Abstract: A reference voltage generating circuit with extremely low temperature dependence is provided. The reference voltage generating circuit includes a BGR circuit which generates a bandgap reference voltage; a bandgap current generating circuit which generates a bandgap current according to the bandgap reference voltage; a PTAT current generating circuit which generates a current proportional to the absolute temperature; and a linear approximate correction current generating circuit which compares the current generated by the PTAT current generating circuit and the bandgap current to generate a correction current, and the BGR circuit adds, to the bandgap reference voltage, a correction voltage generated based on the correction current.

Abstract: A reference voltage generating circuit with extremely low temperature dependence is provided. The reference voltage generating circuit includes a BGR circuit which generates a bandgap reference voltage; a bandgap current generating circuit which generates a bandgap current according to the bandgap reference voltage; a PTAT current generating circuit which generates a current proportional to the absolute temperature; and a linear approximate correction current generating circuit which compares the current generated by the PTAT current generating circuit and the bandgap current to generate a correction current, and the BGR circuit adds, to the bandgap reference voltage, a correction voltage generated based on the correction current.

Abstract: A BGR circuit controls a switch circuit in synchronization with a clock signal from a control signal generating circuit and an inverted signal thereof, and thereby, alternately switches between a differential input terminal receiving a voltage VIM and a differential input terminal receiving a voltage VIP. An LPF circuit includes capacitive elements, a switch connected between an input node and each capacitive element, and a switch connected between an output node and each capacitive element. The LPF circuit controls ON/OFF of the switches in synchronization with a clock signal CLK, and thereby, calculates a moving average value of an output voltage of the BGR circuit in the most recent one clock cycle.

Abstract: A reference voltage generating circuit that accurately corrects temperature characteristics of a BGR (bandgap reference) circuit and a regulator. A voltage dividing circuit outputs first and second voltages obtained by dividing a BGR voltage. The regulator includes a differential amplifier, first and second resisters coupled in series between the output terminal of the differential amplifier and the ground. The positive input terminal of the differential amplifier receives the BGR voltage, and the negative input terminal is coupled to a coupled node between third and fourth resistors. The BGR circuit outputs a third voltage varying with a temperature determined by a predetermined amount of current flowing in the BGR circuit and a predetermined resistor. A temperature-characteristics correcting circuit controls a correcting current flowing through the coupled node so that its magnitude varies with the difference between the first and third voltages, and the difference between the second and third voltages.

Abstract: A reference voltage generating circuit that accurately corrects temperature characteristics of a BGR (bandgap reference) circuit and a regulator. A voltage dividing circuit outputs first and second voltages obtained by dividing a BGR voltage. The regulator includes a differential amplifier, first and second resisters coupled in series between the output terminal of the differential amplifier and the ground. The positive input terminal of the differential amplifier receives the BGR voltage, and the negative input terminal is coupled to a coupled node between third and fourth resistors. The BGR circuit outputs a third voltage varying with a temperature determined by a predetermined amount of current flowing in the BGR circuit and a predetermined resistor. A temperature-characteristics correcting circuit controls a correcting current flowing through the coupled node so that its magnitude varies with the difference between the first and third voltages, and the difference between the second and third voltages.