Patents by Inventor Mitsuyoshi Imai
Mitsuyoshi Imai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180166374Abstract: A wiring substrate includes a flexible insulation substrate, a first wiring layer formed on an upper surface of the insulation substrate, a second wiring layer formed on a lower surface of the insulation substrate, and through wiring bonded to the first wiring layer and the second wiring layer and formed in a through hole extending through the first wiring layer, the insulation substrate, and the second wiring layer. The through wiring includes a projection that extends along a lower surface of the second wiring layer located outside the through hole. An upper surface of the through wiring is flush with an upper surface of the first wiring layer.Type: ApplicationFiled: November 7, 2017Publication date: June 14, 2018Inventors: KIYOKAZU SATO, MITSUYOSHI IMAI, OSAMU HOSHINO
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Patent number: 9997448Abstract: A wiring substrate includes a flexible insulation substrate, a first wiring layer formed on an upper surface of the insulation substrate, a second wiring layer formed on a lower surface of the insulation substrate, and through wiring bonded to the first wiring layer and the second wiring layer and formed in a through hole extending through the first wiring layer, the insulation substrate, and the second wiring layer. The through wiring includes a projection that extends along a lower surface of the second wiring layer located outside the through hole. An upper surface of the through wiring is flush with an upper surface of the first wiring layer.Type: GrantFiled: November 7, 2017Date of Patent: June 12, 2018Assignee: Shinko Electric Industries Co., LtdInventors: Kiyokazu Sato, Mitsuyoshi Imai, Osamu Hoshino
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Patent number: 8945336Abstract: A wiring substrate includes an adhesive layer, a wiring layer, and a support substrate. The adhesive layer includes a first surface and a second surface that is opposite to the first surface. The wiring layer is formed on the first surface of the adhesive layer. The support substrate is formed on the second surface of the adhesive layer. The wiring layer is partially exposed in a through hole extending through the adhesive layer and the support substrate in a thicknesswise direction. The support substrate is adhered to the adhesive layer in a removable manner.Type: GrantFiled: June 25, 2013Date of Patent: February 3, 2015Assignee: Shinko Electric Industries Co., Ltd.Inventors: Atsushi Nakamura, Mitsuyoshi Imai
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Publication number: 20140001648Abstract: A wiring substrate includes an adhesive layer, a wiring layer, and a support substrate. The adhesive layer includes a first surface and a second surface that is opposite to the first surface. The wiring layer is formed on the first surface of the adhesive layer. The support substrate is formed on the second surface of the adhesive layer. The wiring layer is partially exposed in a through hole extending through the adhesive layer and the support substrate in a thicknesswise direction. The support substrate is adhered to the adhesive layer in a removable manner.Type: ApplicationFiled: June 25, 2013Publication date: January 2, 2014Inventors: Atsushi NAKAMURA, Mitsuyoshi IMAI
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Patent number: 7901997Abstract: A solder 14 is formed, by a plating method, on a connecting surface 21A and a side surface 21B in a connecting pad 21 of a wiring board 11 which is opposed to a metal bump 13 formed on an electrode pad 31 of a semiconductor chip 12, and subsequently, the solder 14 is molten to form an accumulated solder 15 taking a convex shape on the connecting surface 21A of the connecting pad 21 and the metal bump 13 is then mounted on the connecting surface 21A of the connecting pad 21 on which the accumulated solder is formed, and the accumulated solder 15 and the metal bump 13 are thus bonded to each other.Type: GrantFiled: January 29, 2008Date of Patent: March 8, 2011Assignee: Shinko Electric Industries Co., Ltd.Inventors: Takashi Ozawa, Seiji Sato, Masao Nakazawa, Mitsuyoshi Imai, Masatoshi Nakamura, Kei Imafuji
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Publication number: 20080188040Abstract: A solder 14 is formed, by a plating method, on a connecting surface 21A and a side surface 21B in a connecting pad 21 of a wiring board 11 which is opposed to a metal bump 13 formed on an electrode pad 31 of a semiconductor chip 12, and subsequently, the solder 14 is molten to form an accumulated solder 15 taking a convex shape on the connecting surface 21A of the connecting pad 21 and the metal bump 13 is then mounted on the connecting surface 21A of the connecting pad 21 on which the accumulated solder is formed, and the accumulated solder 15 and the metal bump 13 are thus bonded to each other.Type: ApplicationFiled: January 29, 2008Publication date: August 7, 2008Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.Inventors: Takashi Ozawa, Seiji Sato, Masao Nakazawa, Mitsuyoshi Imai, Masatoshi Nakamura, Kei Imafuji
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Patent number: 6700198Abstract: In order to improve adhesion between a plated film which functions as an external connection terminal of a semiconductor device and a surface of a resin protuberance and to improve reliability, a carrier substrate includes a metal substrate which is shaped into a sheet form, to which a semiconductor chip is fixed, and which is removed before the semiconductor device is completed, a recess formed at a position of the metal substrate corresponding to the resin protuberance and having a rugged bottom surface and/or a rugged side surface, and a plated film formed on the inner surface of the recess.Type: GrantFiled: October 5, 2001Date of Patent: March 2, 2004Assignees: Shinko Electric Industries Co., Ltd., Fujitsu LimitedInventors: Hideki Toya, Mitsuyoshi Imai, Masaki Sakaguchi, Naoki Yamabe, Mamoru Suwa, Toshiyuki Motooka, Hideharu Sakoda, Muneharu Morioka
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Patent number: 6348416Abstract: In order to improve adhesion between a plated film which functions as an external connection terminal of a semiconductor device and a surface of a resin protuberance and to improve reliability, a carrier substrate includes a metal substrate 12 which is shaped into a sheet form, to which a semiconductor chip is fixed, and which is removed before the semiconductor device is completed, a recess 16 formed at a position of the metal substrate 12 corresponding to the resin protuberance and having a rugged bottom surface 16a and/or a rugged side surface, and a plated film 14 formed on the inner surface of the recess 16.Type: GrantFiled: December 6, 1999Date of Patent: February 19, 2002Assignees: Shinko Electric Industries Co., Ltd, Fujitsu LimitedInventors: Hideki Toya, Mitsuyoshi Imai, Masaki Sakaguchi, Naoki Yamabe, Mamoru Suwa, Toshiyuki Motooka, Hideharu Sakoda, Muneharu Morioka
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Publication number: 20020019133Abstract: In order to improve adhesion between a plated film which functions as an external connection terminal of a semiconductor device and a surface of a resin protuberance and to improve reliability, a carrier substrate includes a metal substrate which is shaped into a sheet form, to which a semiconductor chip is fixed, and which is removed before the semiconductor device is completed, a recess formed at a position of the metal substrate corresponding to the resin protuberance and having a rugged bottom surface and/or a rugged side surface, and a plated film formed on the inner surface of the recess.Type: ApplicationFiled: October 5, 2001Publication date: February 14, 2002Applicant: Shinko Electric Industries Co., LtdInventors: Hideki Toya, Mitsuyoshi Imai, Masaki Sakaguchi, Naoki Yamabe, Mamoru Suwa, Toshiyuki Motooka, Hideharu Sakoda, Muneharu Morioka