Abstract: Flexible interconnects, flexible integrated circuit systems and devices, and methods of making and using flexible integrated circuitry are presented herein. A flexible integrated circuit system is disclosed which includes first and second discrete devices that are electrically connected by a discrete flexible interconnect. The first discrete devices includes a first flexible multi-layer integrated circuit (IC) package with a first electrical connection pad on an outer surface thereof. The second discrete device includes a second flexible multi-layer integrated circuit (IC) package with a second electrical connection pad on an outer surface thereof. The discrete flexible interconnect is attached to and electrically connects the first electrical connection pad of the first discrete device to the second electrical connection pad of the second discrete device.

Abstract: Flexible integrated circuit (IC) modules, flexible IC devices, and methods of making and using flexible IC modules are presented herein. A flexible integrated circuit module is disclosed which includes a flexible substrate and a semiconductor die attached to the flexible substrate. An encapsulating layer, which is attached to the flexible substrate, includes a thermoplastic resin and/or a polyimide adhesive encasing therein the semiconductor die. The encapsulating layer may be an acrylic-based thermally conductive and electrically isolating polyimide adhesive. Optionally, the encapsulating layer may be a B-stage FR-4 glass-reinforced epoxy thermoplastic polymer or copolymer or blend. The die may be embedded between two flexible substrates, each of which includes a layer of flexible polymer, such as a polyimide sheet, with two layers of conductive material, such as copper cladding, disposed on opposing sides of the layer of flexible polymer.

Abstract: Systems and methods are provided for the embedding of thin chips. A well region is generated in a substrate that includes a conductive material disposed on a flexible polymer. The standoff well region can be generated by pattern the conductive material, where the thin chip is embedded in the standoff well region. A cavity can be generated in the polymer layer to form a polymer well region, where the thin chip is embedded in the polymer well region.

Abstract: Flexible integrated circuit (IC) modules, flexible IC devices, and methods of making and using flexible IC modules are presented herein. A flexible integrated circuit module is disclosed which includes a flexible substrate and a semiconductor die attached to the flexible substrate. An encapsulating layer, which is attached to the flexible substrate, includes a thermoplastic resin and/or a polyimide adhesive encasing therein the semiconductor die. The encapsulating layer may be an acrylic-based thermally conductive and electrically isolating polyimide adhesive. Optionally, the encapsulating layer may be a B-stage FR-4 glass-reinforced epoxy thermoplastic polymer or copolymer or blend. The die may be embedded between two flexible substrates, each of which includes a layer of flexible polymer, such as a polyimide sheet, with two layers of conductive material, such as copper cladding, disposed on opposing sides of the layer of flexible polymer.

Abstract: Systems and methods are provided for the embedding of thin chips. A well region is generated in a substrate that includes a conductive material disposed on a flexible polymer. The standoff well region can be generated by pattern the conductive material, where the thin chip is embedded in the standoff well region. A cavity can be generated in the polymer layer to form a polymer well region, where the thin chip is embedded in the polymer well region.

Abstract: Flexible interconnects, flexible integrated circuit systems and devices, and methods of making and using flexible integrated circuitry are presented herein. A flexible integrated circuit system is disclosed which includes first and second discrete devices that are electrically connected by a discrete flexible interconnect. The first discrete devices includes a first flexible multi-layer integrated circuit (IC) package with a first electrical connection pad on an outer surface thereof. The second discrete device includes a second flexible multi-layer integrated circuit (IC) package with a second electrical connection pad on an outer surface thereof. The discrete flexible interconnect is attached to and electrically connects the first electrical connection pad of the first discrete device to the second electrical connection pad of the second discrete device.

Abstract: Systems and methods are provided for the embedding of thin chips. A well region is generated in a substrate that includes a conductive material disposed on a flexible polymer. The standoff well region can be generated by pattern the conductive material, where the thin chip is embedded in the standoff well region. A cavity can be generated in the polymer layer to form a polymer well region, where the thin chip is embedded in the polymer well region.

Abstract: Systems and methods are provided for the embedding of thin chips. A well region is generated in a substrate that includes a conductive material disposed on a flexible polymer. The standoff well region can he generated by pattern the conductive material, where the thin chip is embedded in the standoff well region. A cavity can be generated in the polymer layer to form a polymer well region, where the thin chip is embedded in the polymer well region.

Abstract: Flexible integrated circuit (IC) modules, flexible IC devices, and methods of making and using flexible IC modules are presented herein. A flexible integrated circuit module is disclosed which includes a flexible substrate and a semiconductor die attached to the flexible substrate. An encapsulating layer, which is attached to the flexible substrate, includes a thermoplastic resin and/or a polyimide adhesive encasing therein the semiconductor die. The encapsulating layer may be an acrylic-based thermally conductive and electrically isolating polyimide adhesive. Optionally, the encapsulating layer may be a B-stage FR-4 glass-reinforced epoxy thermoplastic polymer or copolymer or blend. The die may be embedded between two flexible substrates, each of which includes a layer of flexible polymer, such as a polyimide sheet, with two layers of conductive material, such as copper cladding, disposed on opposing sides of the layer of flexible polymer.

Abstract: Flexible interconnects, flexible integrated circuit systems and devices, and methods of making and using flexible integrated circuitry are presented herein. A flexible integrated circuit system is disclosed which includes first and second discrete devices that are electrically connected by a discrete flexible interconnect. The first discrete devices includes a first flexible multi-layer integrated circuit (IC) package with a first electrical connection pad on an outer surface thereof. The second discrete device includes a second flexible multi-layer integrated circuit (IC) package with a second electrical connection pad on an outer surface thereof. The discrete flexible interconnect is attached to and electrically connects the first electrical connection pad of the first discrete device to the second electrical connection pad of the second discrete device.

Abstract: A capillary tool for use in feeding, bending, and attaching a bonding wire between a pair of bond pads includes a body and a heating element. The body has an internal tube that extends from a first surface of the capillary tool to a second surface of the capillary tool. In some implementations, the internal tube has a portion with a generally helical shape that includes at least a portion of one complete revolution about a central axis of the body. The heating element is coupled to the body to provide a heat affected zone along a portion of the internal tube that heats the bonding wire as the bonding wire is fed through the internal tube.

Abstract: The present invention relates to a flexible antenna that can harvest energy for short-range wireless communication such as near-field communication. The flexible antenna comprises a plurality of metal loops arranged in a concentric manner and disposed on a flexible base substrate. In some embodiments the flexible antenna can be stretchable. In some embodiments, the flexible antenna can be conformal. A flexible device comprising a chip or an integrated circuit electrically connected to the antenna can be used to perform one or more desirable functions (including user authentication, mobile payments, and/or location tracking) The flexible device can adhere to a surface such as the skin of a user.

Abstract: Systems and methods are provided for the embedding of thin chips. A well region is generated in a substrate that includes a conductive material disposed on a flexible polymer. The standoff well region can be generated by pattern the conductive material, where the thin chip is embedded in the standoff well region. A cavity can be generated in the polymer layer to form a polymer well region, where the thin chip is embedded in the polymer well region.

Abstract: A method of etching a plurality of cavities in a wafer provides a wafer having a patterned hard mask layer. The patterned hard mask has open areas defining locations for first cavities and second cavities. A mask is applied to cover the patterned hard mask layer. The mask is etched to remove wafer material from areas defined by the second cavities. The mask is removed and etching then removes wafer material except as prevented by the hard mask layer. This leaves the first cavities with a first depth and further deepens the second cavities to a depth greater than the first depth. By suitably configuring the second cavities, a capped die can be formed by securing the wafer to a second wafer and removing at least a portion of the unsecured side of the first wafer to expose the second cavities, thereby forming a plurality of caps on the second wafer.

Abstract: A method of etching a plurality of cavities in a wafer provides a wafer having a patterned hard mask layer. The patterned hard mask has open areas defining locations for first cavities and second cavities. A mask is applied to cover the patterned hard mask layer. The mask is etched to remove wafer material from areas defined by the second cavities. The mask is removed and etching then removes wafer material except as prevented by the hard mask layer. This leaves the first cavities with a first depth and further deepens the second cavities to a depth greater than the first depth. By suitably configuring the second cavities, a capped die can be formed by securing the wafer to a second wafer and removing at least a portion of the unsecured side of the first wafer to expose the second cavities, thereby forming a plurality of caps on the second wafer.

Abstract: A method of forming a capped die forms a cap wafer having a top side and a bottom side. The bottom side is formed with 1) a plurality of device cavities having a first depth, and 2) a plurality of second cavities that each have a greater depth than the first depth. At least some of the plurality of second cavities each generally circumscribe at least one of the device cavities. The method then secures the cap wafer to a device wafer in a manner that causes a plurality of the device cavities each to circumscribe at least one of circuitry and structure on the device wafer. Next, the method removes at least a portion of the top side of the cap wafer to expose the second cavities. This forms a plurality of caps that each protect the noted circuitry and structure.

Abstract: A method of forming a capped die forms a cap wafer having a top side and a bottom side. The bottom side is formed with 1) a plurality of device cavities having a first depth, and 2) a plurality of second cavities that each have a greater depth than the first depth. At least some of the plurality of second cavities each generally circumscribe at least one of the device cavities. The method then secures the cap wafer to a device wafer in a manner that causes a plurality of the device cavities each to circumscribe at least one of circuitry and structure on the device wafer. Next, the method removes at least a portion of the top side of the cap wafer to expose the second cavities. This forms a plurality of caps that each protect the noted circuitry and structure.