Patents by Inventor Miwa Mutoh

Miwa Mutoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Automatic gain control circuit
    Patent number: 9143110
    Abstract: An automatic gain control circuit (5a) includes a peak detector circuit (10) that detects the peak voltage of the output signal from a variable gain amplifier (3), an average value detection and output amplitude setting circuit (11) that detects the average voltage of the output signals from the variable gain amplifier (3) and adds a voltage ½ the desired output amplitude of the variable gain amplifier (3) to the average voltage, and a high gain amplifier (12) that amplifies the difference between the output voltage of the peak detector circuit (10) and the output voltage of the average value detection and output amplitude setting circuit (11) and controls the gain of the variable gain amplifier (3) using the amplification result as a gain control signal. The peak detector circuit (10) includes transistors (Q1, Q2, Q3), a current source (I1), and a filter circuit. The filter circuit includes a series connection of a resistor (Ra) and a capacitor (C1).
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: September 22, 2015
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Kimikazu Sano, Hiroyuki Fukuyama, Makoto Nakamura, Hideyuki Nosaka, Miwa Mutoh, Koichi Murata
  • AUTOMATIC GAIN CONTROL CIRCUIT
    Publication number: 20140097901
    Abstract: An automatic gain control circuit (5a) includes a peak detector circuit (10) that detects the peak voltage of the output signal from a variable gain amplifier (3), an average value detection and output amplitude setting circuit (11) that detects the average voltage of the output signals from the variable gain amplifier (3) and adds a voltage ½ the desired output amplitude of the variable gain amplifier (3) to the average voltage, and a high gain amplifier (12) that amplifies the difference between the output voltage of the peak detector circuit (10) and the output voltage of the average value detection and output amplitude setting circuit (11) and controls the gain of the variable gain amplifier (3) using the amplification result as a gain control signal. The peak detector circuit (10) includes transistors (Q1, Q2, Q3), a current source (I1), and a filter circuit. The filter circuit includes a series connection of a resistor (Ra) and a capacitor (C1).
    Type: Application
    Filed: June 29, 2012
    Publication date: April 10, 2014
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Kimikazu Sano, Hiroyuki Fukuyama, Makoto Nakamura, Hideyuki Nosaka, Miwa Mutoh, Koichi Murata