Patents by Inventor Miwako Akiyama

Miwako Akiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080116512
    Abstract: A semiconductor device includes a first conductivity type layer and a second conductivity type layer, which are alternately and repeatedly positioned, adjacent to each other, in a column-like fashion on a first conductivity type substrate. The balance of the net charge amount of the impurity between the first conductivity type layer formed under a second conductivity type base layer in the termination region of the semiconductor device and the second conductivity type layer adjacent to the first conductivity type layer is imbalanced in comparison to the balance of the net charge amount of the impurity between the first conductivity type layer in the device-forming region of the semiconductor device and the second conductivity type layer adjacent to the first conductivity type layer.
    Type: Application
    Filed: November 20, 2007
    Publication date: May 22, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yusuke Kawaguchi, Miwako Akiyama, Yoshihiro Yamaguchi
  • Publication number: 20080099837
    Abstract: This semiconductor device an epitaxial layer of a first conductivity type formed on a surface of the first semiconductor layer, and a base layer of a second conductivity type formed on a surface of the epitaxial layer. A diffusion layer of a first conductivity type is selectively formed in the base layer, and a trench penetrates the base layer to reach the epitaxial layer. A gate electrode is formed in the trench through the gate insulator film formed on the inner wall of the trench. A first buried diffusion layer of a second conductivity type is formed in the epitaxial layer deeper than the bottom of the gate electrode. A second buried diffusion layer connects the first buried diffusion layer and the base layer and has a resistance higher than that of the first buried diffusion layer.
    Type: Application
    Filed: October 25, 2007
    Publication date: May 1, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Miwako AKIYAMA, Akio Nakagawa, Yusuke Kawaguchi, Syotaro Ono, Yoshihiro Yamaguchi
  • Publication number: 20080035992
    Abstract: This semiconductor device comprises a drift layer of a first conductivity type formed on a drain layer of a first conductivity type, and a drain electrode electrically connected to the drain layer. A semiconductor base layer of a second conductivity type is formed in a surface of the drift layer, and a source region of a first conductivity type is further formed in the semiconductor base layer. A source electrode is electrically connected to the source region and a semiconductor base layer. Plural gate electrodes are formed through a gate insulation film so that a semiconductor base layer may be sandwiched by the gate electrodes. The width of the semiconductor base layer sandwiched by the gate electrodes is 0.3 micrometers or less.
    Type: Application
    Filed: August 9, 2007
    Publication date: February 14, 2008
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusuke KAWAGUCHI, Yoshihiro Yamaguchi, Syotaro Ono, Akio Nakagawa, Miwako Akiyama, Kazuya Nakayama, Masakazu Yamaguchi
  • Publication number: 20070262410
    Abstract: A semiconductor device includes: a semiconductor layer of a first conductivity type, a plurality of trenches provided on a major surface side of the semiconductor layer, an insulating film provided on an inner wall surface and on top of the trench, a conductive material surrounded by the insulating film and filling the trench, a first semiconductor region of a second conductivity type provided between the trenches, a second semiconductor region of the first conductivity type provided in a surface portion of the first semiconductor region, a mesa of the semiconductor layer provided between the trenches of a Schottky barrier diode region adjacent to a transistor region including the first semiconductor region and the second semiconductor region, a control electrode connected to the conductive material filling the trench of the transistor region and a main electrode provided in contact with a surface of the first semiconductor region, the second semiconductor region, a surface of the mesa and a part of the condu
    Type: Application
    Filed: April 30, 2007
    Publication date: November 15, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Syotaro Ono, Yusuke Kawaguchi, Yoshihiro Yamaguchi, Miwako Akiyama
  • Publication number: 20070194375
    Abstract: This semiconductor device comprises a first semiconductor layer of a first conductivity type, an epitaxial layer of a first conductivity type formed in the surface on the first semiconductor layer, and a base layer of a second conductivity type formed on the surface of the epitaxial layer. Column layers of a second conductivity type are repeatedly formed in the epitaxial layer under the base layer at a certain interval. Trenches are formed so as to penetrate the base layer to reach the epitaxial layer; and gate electrodes are formed in the trenches via a gate insulation film. A termination layer of a second conductivity type is formed on the epitaxial layer at an end region at the perimeter of the base layer. The termination layer is formed to have a junction depth larger than that of the base layer.
    Type: Application
    Filed: February 13, 2007
    Publication date: August 23, 2007
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yusuke Kawaguchi, Yoshihiro Yamaguchi, Syotaro Ono, Miwako Akiyama