Patents by Inventor Miwako FUJITA

Miwako FUJITA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11506701
    Abstract: The electromagnetic noise of a semiconductor device is conveniently evaluated, and the electromagnetic noise of an apparatus equipped with the semiconductor device is estimated. An evaluation method is provided which includes causing one of a first device and a second device of a semiconductor device to perform a switching operation, the semiconductor device comprising the first device and second device connected in series and a third device and a fourth device connected to each other in series and connected parallel to a series circuit of the first device and second device; measuring voltage variation occurring between the third device and the fourth device during the switching operation; and outputting an evaluation benchmark for electromagnetic noise of the semiconductor device, based on the voltage variation.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: November 22, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Miwako Fujita, Michio Tamate, Tamiko Asano, Yuhei Suzuki, Ryu Araki
  • Patent number: 11162993
    Abstract: The radiated noise of a semiconductor device is conveniently evaluated, and the radiated noise of an apparatus equipped with the semiconductor device is estimated. An evaluation method including: making a semiconductor device that is connected parallel to a load by a load cable, perform a switching operation; measuring common-mode current flowing through the load cable during the switching operation; and outputting an evaluation benchmark for radiated noise based on the common-mode current, and an evaluation apparatus are provided.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: November 2, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hiroki Katsumata, Michio Tamate, Miwako Fujita, Tamiko Asano, Yuhei Suzuki, Takashi Kaimi, Yuta Sunasaka, Tadanori Yamada, Ryu Araki, Bao Cong Hiu
  • Patent number: 11143691
    Abstract: The radiated noise of a semiconductor device is conveniently evaluated, and the radiated noise of an apparatus equipped with the semiconductor device is estimated. An evaluation method and an evaluation apparatus are provided, including: causing a semiconductor device to perform a switching operation; measuring voltage variation occurring between main terminals of the semiconductor device during the switching operation; and outputting an evaluation benchmark for radiated noise of the semiconductor device based on the voltage variation. The outputting the evaluation benchmark may include calculating the voltage variation in the semiconductor device for each frequency component as the evaluation benchmark.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: October 12, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hiroki Katsumata, Michio Tamate, Miwako Fujita, Tamiko Asano, Yuhei Suzuki, Takashi Kaimi, Yuta Sunasaka, Tadanori Yamada, Ryu Araki, Bao Cong Hiu
  • Publication number: 20200217884
    Abstract: The electromagnetic noise of a semiconductor device is conveniently evaluated, and the electromagnetic noise of an apparatus equipped with the semiconductor device is estimated. An evaluation method is provided which includes causing one of a first device and a second device of a semiconductor device to perform a switching operation, the semiconductor device comprising the first device and second device connected in series and a third device and a fourth device connected to each other in series and connected parallel to a series circuit of the first device and second device; measuring voltage variation occurring between the third device and the fourth device during the switching operation; and outputting an evaluation benchmark for electromagnetic noise of the semiconductor device, based on the voltage variation.
    Type: Application
    Filed: November 25, 2019
    Publication date: July 9, 2020
    Inventors: Miwako FUJITA, Michio TAMATE, Tamiko ASANO, Yuhei SUZUKI, Ryu ARAKI
  • Patent number: 10581368
    Abstract: The present invention relates to a surge suppression circuit connected between an output end of an inverter INV and a cable 100 to drive a motor M that is connected to the output end of the inverter INV via the cable 100, and relates to a motor drive system in which the surge suppression circuit is used. The surge suppression circuit 300 includes an inductance L and a resistor R connected in parallel with the inductance L. The resistor R is set so as to match, or so as to be less than, an impedance of zero-phase component of the cable 100. A surge suppression circuit and an inverter drive motor system are enabled to be applied to a low-voltage small-capacity inverter with no DC voltage neutral terminal, and enabled to reduce the zero-component of the surge voltage according to the connection to the output end of the inverter.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: March 3, 2020
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Miwako Fujita
  • Publication number: 20190170807
    Abstract: The radiated noise of a semiconductor device is conveniently evaluated, and the radiated noise of an apparatus equipped with the semiconductor device is estimated. An evaluation method and an evaluation apparatus are provided, including: causing a semiconductor device to perform a switching operation; measuring voltage variation occurring between main terminals of the semiconductor device during the switching operation; and outputting an evaluation benchmark for radiated noise of the semiconductor device based on the voltage variation. The outputting the evaluation benchmark may include calculating the voltage variation in the semiconductor device for each frequency component as the evaluation benchmark.
    Type: Application
    Filed: January 29, 2019
    Publication date: June 6, 2019
    Inventors: Hiroki KATSUMATA, Michio TAMATE, Miwako FUJITA, Tamiko ASANO, Yuhei SUZUKI, Takashi KAIMI, Yuta SUNASAKA, Tadanori YAMADA, Ryu ARAKI, Bao Cong HIU
  • Publication number: 20190170798
    Abstract: The radiated noise of a semiconductor device is conveniently evaluated, and the radiated noise of an apparatus equipped with the semiconductor device is estimated. An evaluation method including: making a semiconductor device that is connected parallel to a load by a load cable, perform a switching operation; measuring common-mode current flowing through the load cable during the switching operation; and outputting an evaluation benchmark for radiated noise based on the common-mode current, and an evaluation apparatus are provided.
    Type: Application
    Filed: January 29, 2019
    Publication date: June 6, 2019
    Inventors: Hiroki KATSUMATA, Michio TAMATE, Miwako FUJITA, Tamiko ASANO, Yuhei SUZUKI, Takashi KAIMI, Yuta SUNASAKA, Tadanori YAMADA, Ryu ARAKI, Bao Cong HIU
  • Publication number: 20180331650
    Abstract: The present invention relates to a surge suppression circuit connected between an output end of an inverter INV and a cable 100 to drive a motor M that is connected to the output end of the inverter INV via the cable 100, and relates to a motor drive system in which the surge suppression circuit is used. The surge suppression circuit 300 includes an inductance L and a resistor R connected in parallel with the inductance L. The resistor R is set so as to match, or so as to be less than, an impedance of zero-phase component of the cable 100. A surge suppression circuit and an inverter drive motor system are enabled to be applied to a low-voltage small-capacity inverter with no DC voltage neutral terminal, and enabled to reduce the zero-component of the surge voltage according to the connection to the output end of the inverter.
    Type: Application
    Filed: July 24, 2018
    Publication date: November 15, 2018
    Inventor: Miwako FUJITA
  • Patent number: 9484829
    Abstract: A power conversion device including a power conversion portion that switches direct current voltage supplied by a positive line and negative line of a direct current power supply with a semiconductor switching element, and outputs converted voltage, is such that a plurality of interline capacitors are connected in parallel between the positive line and negative line, the capacitance of the plurality of interline capacitors is of a value that becomes smaller the nearer to the power conversion portion the position in which the interline capacitor is connected, and the capacitance of the interline capacitor with the smallest value of capacitance is set to a value greater than that of the capacitance between main electrodes when a direct current voltage is applied to the switching element used in the power conversion portion.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: November 1, 2016
    Assignees: FUJI ELECTRIC CO., LTD., FUJI ELECTRIC FA COMPONETS & SYSTEMS CO., LTD.
    Inventors: Miwako Fujita, Takashi Kaimi
  • Publication number: 20140321171
    Abstract: A power conversion device including a power conversion portion that switches direct current voltage supplied by a positive line and negative line of a direct current power supply with a semiconductor switching element, and outputs converted voltage, is such that a plurality of interline capacitors are connected in parallel between the positive line and negative line, the capacitance of the plurality of interline capacitors is of a value that becomes smaller the nearer to the power conversion portion the position in which the interline capacitor is connected, and the capacitance of the interline capacitor with the smallest value of capacitance is set to a value greater than that of the capacitance between main electrodes when a direct current voltage is applied to the switching element used in the power conversion portion.
    Type: Application
    Filed: July 14, 2014
    Publication date: October 30, 2014
    Inventors: Miwako FUJITA, Takashi KAIMI