Abstract: A logic analyzer is disclosed which displays at least an input logic signal on a cathode ray tube, controls a cursor position on the cathode ray tube and obtains a relationship between a predetermined phenomenon included in the input logic signal and the cursor position. In a search mode, the predetermined phenomenon is a search word or a glitch. In a compare mode, the predetermined phenomenon is a reference logic signal.

Abstract: A digital logic signal characterized by a bit sequence is displayed on a raster scan type screen in compressed form. The bit sequence is divided into N+1 bit segments and each bit of each segment, excluding the first bit of each segment, is compared to its preceding bit on a bit-by-bit, segment-by-segment basis. If a bit matches its preceding bit, a bit matching the preceding bit is generated. If a bit does not match its preceding bit, a bit opposite in state to the last bit produced is generated. The generated bits thus comprise a compressed sequence of N bit segments each corresponding to one N+1 bit segment of the original data sequence. A compressed waveform based on the generated sequence is then displayed.