Patents by Inventor Miyuki Hosoba
Miyuki Hosoba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9530806Abstract: It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.Type: GrantFiled: October 23, 2014Date of Patent: December 27, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Tsubuku, Shuhei Yoshitomi, Takahiro Tsuji, Miyuki Hosoba, Junichiro Sakata, Hiroyuki Tomatsu, Masahiko Hayakawa
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Patent number: 9515192Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.Type: GrantFiled: September 9, 2015Date of Patent: December 6, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Miyuki Hosoba, Junichiro Sakata, Hideaki Kuwabara
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Publication number: 20160329359Abstract: It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.Type: ApplicationFiled: July 22, 2016Publication date: November 10, 2016Inventors: Masashi TSUBUKU, Shuhei YOSHITOMI, Takahiro TSUJI, Miyuki HOSOBA, Junichiro SAKATA, Hiroyuki TOMATSU, Masahiko HAYAKAWA
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Patent number: 9478563Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.Type: GrantFiled: July 21, 2015Date of Patent: October 25, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichiro Sakata, Toshinari Sasaki, Miyuki Hosoba
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Publication number: 20160307925Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.Type: ApplicationFiled: June 24, 2016Publication date: October 20, 2016Inventors: Shunpei YAMAZAKI, Hiroki OHARA, Junichiro SAKATA, Toshinari SASAKI, Miyuki HOSOBA
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Patent number: 9461181Abstract: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or helium) or under reduced pressure and to a cooling step for treatment for supplying oxygen in an atmosphere of oxygen, an atmosphere of oxygen and nitrogen, or the air (having a dew point of preferably lower than or equal to ?40° C., still preferably lower than or equal to ?50° C.) atmosphere. The oxide semiconductor layer is thus highly purified, whereby an i-type oxide semiconductor layer is formed. A semiconductor device including a thin film transistor having the oxide semiconductor layer is manufactured.Type: GrantFiled: July 22, 2015Date of Patent: October 4, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Miyuki Hosoba, Junichiro Sakata, Hiroki Ohara, Shunpei Yamazaki
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Publication number: 20160225797Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.Type: ApplicationFiled: April 12, 2016Publication date: August 4, 2016Inventors: Junichiro SAKATA, Toshinari SASAKI, Miyuki HOSOBA
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Patent number: 9406706Abstract: It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible. A protective insulating layer is formed to cover a thin film transistor including an oxide semiconductor layer that is dehydrated or dehydrogenated by first heat treatment, and second heat treatment at a temperature that is lower than that of the first heat treatment, in which the increase and decrease in temperature are repeated plural times, is performed, whereby a thin film transistor including an oxide semiconductor layer, in which threshold voltage at which a channel is formed is positive and as close to 0 V as possible without depending on the channel length, can be manufactured.Type: GrantFiled: October 23, 2014Date of Patent: August 2, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masashi Tsubuku, Shuhei Yoshitomi, Takahiro Tsuji, Miyuki Hosoba, Junichiro Sakata, Hiroyuki Tomatsu, Masahiko Hayakawa
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Patent number: 9379141Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.Type: GrantFiled: April 21, 2015Date of Patent: June 28, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroki Ohara, Junichiro Sakata, Toshinari Sasaki, Miyuki Hosoba
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Patent number: 9269794Abstract: An object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.Type: GrantFiled: August 19, 2013Date of Patent: February 23, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hiroki Ohara, Junichiro Sakata, Toshinari Sasaki, Miyuki Hosoba
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Publication number: 20160020330Abstract: An object is to provide a semiconductor device having stable electric characteristics in which an oxide semiconductor is used. An oxide semiconductor layer is subjected to heat treatment for dehydration or dehydrogenation treatment in a nitrogen gas or an inert gas atmosphere such as a rare gas (e.g., argon or helium) or under reduced pressure and to a cooling step for treatment for supplying oxygen in an atmosphere of oxygen, an atmosphere of oxygen and nitrogen, or the air (having a dew point of preferably lower than or equal to ?40° C., still preferably lower than or equal to ?50° C.) atmosphere. The oxide semiconductor layer is thus highly purified, whereby an i-type oxide semiconductor layer is formed. A semiconductor device including a thin film transistor having the oxide semiconductor layer is manufactured.Type: ApplicationFiled: July 22, 2015Publication date: January 21, 2016Inventors: Miyuki HOSOBA, Junichiro SAKATA, Hiroki OHARA, Shunpei YAMAZAKI
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Publication number: 20160005875Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.Type: ApplicationFiled: September 9, 2015Publication date: January 7, 2016Inventors: Shunpei YAMAZAKI, Miyuki HOSOBA, Junichiro Sakata, Hideaki Kuwabara
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Publication number: 20150380566Abstract: An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.Type: ApplicationFiled: August 11, 2015Publication date: December 31, 2015Inventors: Shunichi ITO, Toshinari SASAKI, Miyuki HOSOBA, Junichiro SAKATA
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Patent number: 9202851Abstract: The semiconductor device includes a driver circuit including a first thin film transistor and a pixel including a second thin film transistor over one substrate. The first thin film transistor includes a first gate electrode layer, a gate insulating layer, a first oxide semiconductor layer, a first oxide conductive layer, a second oxide conductive layer, an oxide insulating layer which is in contact with part of the first oxide semiconductor layer and which is in contact with peripheries and side surfaces of the first and second oxide conductive layers, a first source electrode layer, and a first drain electrode layer. The second thin film transistor includes a second gate electrode layer, a second oxide semiconductor layer, and a second source electrode layer and a second drain electrode layer each formed using a light-transmitting material.Type: GrantFiled: December 5, 2013Date of Patent: December 1, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Junichiro Sakata, Miyuki Hosoba, Tatsuya Takahashi
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Publication number: 20150325600Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.Type: ApplicationFiled: July 21, 2015Publication date: November 12, 2015Inventors: Junichiro SAKATA, Toshinari SASAKI, Miyuki HOSOBA
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Publication number: 20150303072Abstract: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.Type: ApplicationFiled: July 2, 2015Publication date: October 22, 2015Inventors: Shunpei YAMAZAKI, Junichiro SAKATA, Masashi TSUBUKU, Kengo AKIMOTO, Miyuki HOSOBA, Masayuki SAKAKURA, Yoshiaki OIKAWA
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Patent number: 9142570Abstract: An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.Type: GrantFiled: July 17, 2014Date of Patent: September 22, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Miyuki Hosoba, Junichiro Sakata, Hideaki Kuwabara
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Patent number: 9136389Abstract: An object is to control composition and a defect of an oxide semiconductor. Another object is to increase field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with off current suppressed. The oxide semiconductor is represented by InMO3(ZnO)n (M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and n is a non-integer number of greater than or equal to 1 and less than 50) and further contains hydrogen. In this case, the concentration of Zn is made to be lower than the concentrations of In and M (M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al). In addition, the oxide semiconductor has an amorphous structure. Here, n is preferably a non-integer number of greater than or equal to 50, more preferably less than 10.Type: GrantFiled: October 19, 2009Date of Patent: September 15, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toshinari Sasaki, Miyuki Hosoba, Shunichi Ito, Junichiro Sakata
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Patent number: 9130046Abstract: An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.Type: GrantFiled: March 28, 2014Date of Patent: September 8, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Junichiro Sakata, Toshinari Sasaki, Miyuki Hosoba
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Patent number: 9123751Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor at low cost with high productivity in such a manner that a photolithography process is simplified by reducing the number of light-exposure masks. In a method for manufacturing a semiconductor device including a channel-etched inverted-staggered thin film transistor, an oxide semiconductor film and a conductive film are etched using a mask layer formed with the use of a multi-tone mask which is a light-exposure mask through which light is transmitted so as to have a plurality of intensities. In etching steps, a first etching step is performed by dry etching in which an etching gas is used, and a second etching step is performed by wet etching in which an etchant is used.Type: GrantFiled: May 27, 2014Date of Patent: September 1, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunichi Ito, Miyuki Hosoba, Hideomi Suzawa, Shinya Sasagawa, Taiga Muraoka