Patents by Inventor Miyuki Izuka

Miyuki Izuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9263640
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a p-side metal pillar, an n-side metal pillar, and an insulator. The semiconductor layer includes a first surface, a second surface opposite to the first surface, and a light emitting layer. The p-side metal pillar includes a p-side external terminal. The n-side metal pillar includes an n-side external terminal. At least one selected from an area and a planar configuration of the p-side external terminal is different from at least one selected from an area and a planar configuration of the n-side external terminal.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: February 16, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Miyuki Izuka, Susumu Obata, Akiya Kimura, Akihiro Kojima, Yosuke Akimoto, Yoshiaka Sugizaki
  • Patent number: 8963189
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar and a second insulating layer. The semiconductor layer includes a first major surface, a second major surface opposite to the first major surface and a light emitting layer. An edge of a part of the first interconnect layer is exposed laterally from the first insulating layer and the second insulating layer.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: February 24, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yosuke Akimoto, Akihiro Kojima, Miyuki Izuka, Yoshiaki Sugizaki
  • Publication number: 20140374789
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a p-side metal pillar, an n-side metal pillar, and an insulator. The semiconductor layer includes a first surface, a second surface opposite to the first surface, and a light emitting layer. The p-side metal pillar includes a p-side external terminal. The n-side metal pillar includes an n-side external terminal. At least one selected from an area and a planar configuration of the p-side external terminal is different from at least one selected from an area and a planar configuration of the n-side external terminal.
    Type: Application
    Filed: September 9, 2014
    Publication date: December 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Miyuki IZUKA, Susumu OBATA, Akiya KIMURA, Akihiro KOJIMA, Yosuke AKIMOTO, Yoshiaka SUGIZAKI
  • Patent number: 8860075
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a p-side metal pillar, an n-side metal pillar, and an insulator. The semiconductor layer includes a first surface, a second surface opposite to the first surface, and a light emitting layer. The p-side metal pillar includes a p-side external terminal. The n-side metal pillar includes an n-side external terminal. At least one selected from an area and a planar configuration of the p-side external terminal is different from at least one selected from an area and a planar configuration of the n-side external terminal.
    Type: Grant
    Filed: August 8, 2013
    Date of Patent: October 14, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Miyuki Izuka, Susumu Obata, Akiya Kimura, Akihiro Kojima, Yosuke Akimoto, Yoshiaki Sugizaki
  • Patent number: 8692279
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, and a second insulating layer. The semiconductor layer includes a first major surface, a second major surface opposite to the first major surface, and a light emitting layer. The first electrode is provided on a region including the light emitting layer on the second major surface. The second electrode is provided on the second major surface and interposed in the first electrode in a planar view.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: April 8, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Miyuki Izuka, Yosuke Akimoto, Akihiro Kojima, Yoshiaki Sugizaki
  • Publication number: 20130320383
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a p-side metal pillar, an n-side metal pillar, and an insulator. The semiconductor layer includes a first surface, a second surface opposite to the first surface, and a light emitting layer. The p-side metal pillar includes a p-side external terminal. The n-side metal pillar includes an n-side external terminal. At least one selected from an area and a planar configuration of the p-side external terminal is different from at least one selected from an area and a planar configuration of the n-side external terminal.
    Type: Application
    Filed: August 8, 2013
    Publication date: December 5, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Miyuki IZUKA, Susumu Obata, Akiya Kimura, Akihiro Kojima, Yosuke Akimoto, Yoshiaki Sugizaki
  • Patent number: 8399275
    Abstract: According to one embodiment, a method for manufacturing a semiconductor light emitting device is disclosed. The method can include forming a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, a second insulating layer, a transparent material and a phosphor layer. The transparent material is formed on the first major surface of a semiconductor layer selected from the plurality of semiconductor layers on the basis of an emission spectrum of a light obtained from the first major surface side. The transparent material transmits the light. The phosphor layer is formed on the transparent material and the first major surface of the plurality of the semiconductor layers.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: March 19, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yosuke Akimoto, Akihiro Kojima, Miyuki Izuka, Yoshiaki Sugizaki, Hiroshi Koizumi, Tomomichi Naka, Yasuhide Okada
  • Publication number: 20110300644
    Abstract: According to one embodiment, a method for manufacturing a semiconductor light emitting device is disclosed. The method can include forming a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, a second insulating layer, a transparent material and a phosphor layer. The transparent material is formed on the first major surface of a semiconductor layer selected from the plurality of semiconductor layers on the basis of an emission spectrum of a light obtained from the first major surface side. The transparent material transmits the light. The phosphor layer is formed on the transparent material and the first major surface of the plurality of the semiconductor layers.
    Type: Application
    Filed: June 6, 2011
    Publication date: December 8, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Akimoto, Akihiro Kojima, Miyuki Izuka, Yoshiaki Sugizaki, Hiroshi Koizumi, Tomomichi Naka, Yasuhide Okada
  • Publication number: 20110297997
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, and a second insulating layer. The semiconductor layer includes a first major surface, a second major surface opposite to the first major surface, and a light emitting layer. The first electrode is provided on a region including the light emitting layer on the second major surface. The second electrode is provided on the second major surface and interposed in the first electrode in a planar view.
    Type: Application
    Filed: March 21, 2011
    Publication date: December 8, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Miyuki Izuka, Yosuke Akimoto, Akihiro Kojima, Yoshiaki Sugizaki
  • Publication number: 20110297998
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar and a second insulating layer. The semiconductor layer includes a first major surface, a second major surface opposite to the first major surface and a light emitting layer. An edge of a part of the first interconnect layer is exposed laterally from the first insulating layer and the second insulating layer.
    Type: Application
    Filed: March 21, 2011
    Publication date: December 8, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Akimoto, Akihiro Kojima, Miyuki Izuka, Yoshiaki Sugizaki