Patents by Inventor Miyuki Matsuo

Miyuki Matsuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11956067
    Abstract: According to one embodiment, a wireless base station includes a transmitter and a receiver. The transmitter transmits a control signal and one or more operation signals to the second wireless communication terminal. The control signal instructs to transmit a signal that requests terminal-to-terminal communication between a first wireless communication terminal and the second wireless communication terminal. The operation signals are used for operating at least a part of the first wireless communication terminal. The receiver is capable of receiving at least one of a response signal or a data signal transmitted from the first wireless communication terminal to the second wireless communication terminal after the operation signals are transmitted.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 9, 2024
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryoko Matsuo, Miyuki Ogura, Koji Akita, Tomoya Tandai, Toshihisa Nabetani, Tsuyoshi Kogawa
  • Patent number: 11281559
    Abstract: An information processing apparatus includes a memory; and a processor coupled to the memory and configured to generate a performance model for calculating a performance value of an application program from a power restriction for each set of parameters of the application program, based on data acquired when a computing apparatus executes the application program for each set of parameters of the application program under each of a plurality of power restrictions; calculate, for each set of parameters of the application program, the performance value of the application program from a first power restriction different from any of the plurality of power restrictions, based on the performance model generated for each set of parameters of the application program; and output a set of parameters of the application program corresponding to a highest performance value of the calculated performance values.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: March 22, 2022
    Assignee: FUJITSU LIMITED
    Inventors: Miyuki Matsuo, Kohta Nakashima
  • Patent number: 10712794
    Abstract: An apparatus is configured to calculate consumption power of a processor caused by execution of a program, based on sampling data acquired by event-based sampling. The apparatus determines whether the processor is in an idle state, by using the sampling data of a clock event, where the clock event is an event which generates an interrupt at fixed time intervals when the processor is not in the idle state, and which generates the interrupt when a state of the processor changes from the idle state to a non-idle state. In a case where the processor is in the idle state, the apparatus calculates a first amount of consumption power of the processor in the idle state, based on a second amount of consumption power calculated using a consumption power model and a third amount of consumption power included in the sampling data.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: July 14, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Miyuki Matsuo, Kohta Nakashima
  • Patent number: 10275006
    Abstract: An information processing device includes a memory to store a power consumption amount for each first time interval output at each first time interval and an occurrence time of a first event which occurs during the first time interval, and a power estimation processor configured to calculate a power consumption amount in the event of an occurrence of the first event, on the basis of the power consumption amount for each first time interval output at each first time interval, and the occurrence time of the first event.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: April 30, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Miyuki Matsuo, Kohta Nakashima
  • Patent number: 10241884
    Abstract: An information processing apparatus includes a memory, and a processor coupled to the memory and configured to obtain performance data of the information processing apparatus at a first time interval repetitively, write the performance data in the memory when a particular value of the performance data indicates a performance decrement of the information processing apparatus, and set a second time interval longer than the first time interval instead of the first time interval for obtaining the performance data when the particular value does not indicate a performance decrement of the information processing apparatus.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: March 26, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Miyuki Matsuo, Kohta Nakashima
  • Publication number: 20190073287
    Abstract: An information processing apparatus includes a memory; and a processor coupled to the memory and configured to generate a performance model for calculating a performance value of an application program from a power restriction for each set of parameters of the application program, based on data acquired when a computing apparatus executes the application program for each set of parameters of the application program under each of a plurality of power restrictions; calculate, for each set of parameters of the application program, the performance value of the application program from a first power restriction different from any of the plurality of power restrictions, based on the performance model generated for each set of parameters of the application program; and output a set of parameters of the application program corresponding to a highest performance value of the calculated performance values.
    Type: Application
    Filed: August 31, 2018
    Publication date: March 7, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Miyuki Matsuo, Kohta Nakashima
  • Publication number: 20190065282
    Abstract: An information processing apparatus includes a processor that acquires a temperature of each of a plurality of arithmetic processing devices. The processor acquires a first raised temperature and a second raised temperature for a first predetermined processing. The first raised temperature is a temperature expected to be raised in a first arithmetic processing device if the first arithmetic processing device executes the first predetermined processing. The second raised temperature is a temperature expected to be raised in a second arithmetic processing device if the first arithmetic processing device executes the first predetermined processing. The second arithmetic processing device is different from the first arithmetic processing device. The processor determines an arithmetic processing device to be assigned to execute the first predetermined processing, based on the temperature of each of the plurality of arithmetic processing devices, the first raised temperature, and the second raised temperature.
    Type: Application
    Filed: August 24, 2018
    Publication date: February 28, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Miyuki Matsuo, Kohta Nakashima
  • Publication number: 20180246555
    Abstract: An apparatus is configured to calculate consumption power of a processor caused by execution of a program, based on sampling data acquired by event-based sampling. The apparatus determines whether the processor is in an idle state, by using the sampling data of a clock event, where the clock event is an event which generates an interrupt at fixed time intervals when the processor is not in the idle state, and which generates the interrupt when a state of the processor changes from the idle state to a non-idle state. In a case where the processor is in the idle state, the apparatus calculates a first amount of consumption power of the processor in the idle state, based on a second amount of consumption power calculated using a consumption power model and a third amount of consumption power included in the sampling data.
    Type: Application
    Filed: February 12, 2018
    Publication date: August 30, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Miyuki Matsuo, Kohta Nakashima
  • Publication number: 20170269678
    Abstract: An information processing device includes: a memory configured to store a power measuring program; and a processor configured to execute the power measuring program, wherein the processor, based on the power measuring program, identifying an event to be used for sampling of an amount of power consumption by using a power consumption model based on the event occurring in the processor; and calculating a sampling interval of an identified event based on an electric energy sampling interval as a sampling interval of the amount of power consumption and the power consumption model.
    Type: Application
    Filed: December 19, 2016
    Publication date: September 21, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Miyuki Matsuo, Kohta Nakashima
  • Publication number: 20170228303
    Abstract: An information processing apparatus includes a memory, and a processor coupled to the memory and configured to obtain performance data of the information processing apparatus at a first time interval repetitively, write the performance data in the memory when a particular value of the performance data indicates a performance decrement of the information processing apparatus, and set a second time interval longer than the first time interval instead of the first time interval for obtaining the performance data when the particular value does not indicate a performance decrement of the information processing apparatus.
    Type: Application
    Filed: January 19, 2017
    Publication date: August 10, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Miyuki Matsuo, Kohta Nakashima
  • Publication number: 20170031414
    Abstract: An information processing device includes a memory to store a power consumption amount for each first time interval output at each first time interval and an occurrence time of a first event which occurs during the first time interval, and a power estimation processor configured to calculate a power consumption amount in the event of an occurrence of the first event, on the basis of the power consumption amount for each first time interval output at each first time interval, and the occurrence time of the first event.
    Type: Application
    Filed: June 29, 2016
    Publication date: February 2, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Miyuki Matsuo, Kohta Nakashima