Abstract: A mobile telephone device provided with a video display mode displaying a video based on video data, and a telephone mode, includes: a display screen; a speaker; a memory for storing first display setting information and first sound setting information in the video display mode and second display setting information and second sound setting information in the telephone mode, wherein the second display setting information is configured to be set by a user input to provide a luminance that is greater than zero; and a processor configured to control the display module and the sound output module based on the first display setting information and the first sound setting information during the video display mode, and configured to control the display module and the sound output module based on the second display setting information and the second sound setting information during the telephone mode.

Abstract: A mobile telephone device provided with a video display mode displaying a video based on video data, and a telephone mode, includes: a display screen; a speaker; a memory for storing first display setting information and first sound setting information in the video display mode and second display setting information and second sound setting information in the telephone mode, wherein the second display setting information is configured to be set by a user input to provide a luminance that is greater than zero; and a processor configured to control the display module and the sound output module based on the first display setting information and the first sound setting information during the video display mode, and configured to control the display module and the sound output module based on the second display setting information and the second sound setting information during the telephone mode.

Abstract: A flash memory in a memory (9) connected to a baseband chip (3) stores related information on an image/sound in a telephone mode (contrast information, screen luminance information, and sound volume information in the telephone mode), and related information on an image/sound in a television-viewing mode (contrast information, screen luminance information, and sound volume information in the television-viewing mode). In the telephone mode, a display device (6) and a speaker unit (7) are driven based on the related information on the image/sound in the telephone mode. In the television-viewing mode, the display device (6) and the speaker unit (7) are driven based on the related information on the image/sound in the television-viewing mode.

Abstract: A flash memory in a memory (9) connected to a baseband chip (3) stores related information on an image/sound in a telephone mode (contrast information, screen luminance information, and sound volume information in the telephone mode), and related information on an image/sound in a television-viewing mode (contrast information, screen luminance information, and sound volume information in the television-viewing mode). In the telephone mode, a display device (6) and a speaker unit (7) are driven based on the related information on the image/sound in the telephone mode. In the television-viewing mode, the display device (6) and the speaker unit (7) are driven based on the related information on the image/sound in the television-viewing mode.

Abstract: A flash memory in a memory (9) connected to a baseband chip (3) stores related information on an image/sound in a telephone mode (contrast information, screen luminance information, and sound volume information in the telephone mode), and related information on an image/sound in a television-viewing mode (contrast information, screen luminance information, and sound volume information in the television-viewing mode). In the telephone mode, a display device (6) and a speaker unit (7) are driven based on the related information on the image/sound in the telephone mode. In the television-viewing mode, the display device (6) and the speaker unit (7) are driven based on the related information on the image/sound in the television-viewing mode.

Abstract: A flash memory in a memory (9) connected to a baseband chip (3) stores related information on an image/sound in a telephone mode (contrast information, screen luminance information, and sound volume information in the telephone mode), and related information on an image/sound in a television-viewing mode (contrast information, screen luminance information, and sound volume information in the television-viewing mode). In the telephone mode, a display device (6) and a speaker unit (7) are driven based on the related information on the image/sound in the telephone mode. In the television-viewing mode, the display device (6) and the speaker unit (7) are driven based on the related information on the image/sound in the television-viewing mode.

Abstract: An error correction circuit capable of detecting burst errors included in a data signal with reliability. The error correction circuit comprises a reading unit, a first estimation unit, a second estimation unit, and a correction unit. The reading unit reads the data signal. The first estimation unit estimates error locations based on BIS code included in the data signal, and stores the locations into an error location storing unit. The second estimation unit estimates error locations based on characteristics of bit strings adjoining the BIS code, and stores the locations into the error location storing unit. The correction unit identifies erasure locations based on the error locations stored in the error location storing unit, and performs erasure correction on the erasure locations identified. Since the error locations are estimated based on the BIS code and the characteristics of the bit strings adjoining the BIS code as well, it is possible to detect burst errors without fail.

Abstract: An optical disc signal processing circuit that includes a read data input unit configured to write read data into a buffer memory, the read data being subjected to a scramble process; an error correction processing unit configured to apply an error correction process to the read data read from the buffer memory, the error correction process being a process of performing error correction with an error correction code, and to write into the buffer memory the read data subjected to the error correction process; an external device interface unit configured to read from the buffer memory the read data subjected to the error correction process and apply a descramble process thereto; and a memory copy processing unit configured to read from the buffer memory the read data and apply the descramble process thereto, and to write into the buffer memory the read data subjected to the descramble process.

Abstract: A flash memory in a memory (9) connected to a baseband chip (3) stores related information on an image/sound in a telephone mode (contrast information, screen luminance information, and sound volume information in the telephone mode), and related information on an image/sound in a television-viewing mode (contrast information, screen luminance information, and sound volume information in the television-viewing mode). In the telephone mode, a display device (6) and a speaker unit (7) are driven based on the related information on the image/sound in the telephone mode. In the television-viewing mode, the display device (6) and the speaker unit (7) are driven based on the related information on the image/sound in the television-viewing mode.

Abstract: To provide a data encoding circuit capable of securing real-timeness of a recording operation even in a memory of a low operation clock frequency by reducing the number of times of accessing the memory, and simultaneously reducing power consumption and memory costs. Prior to error correction encoding of a PI direction, error correction encoding of a PO direction is carried out at a PO arithmetic operation circuit (105), and an obtained PO code is added to corresponding data and written in a memory (101). Subsequently, data are read line by line in a PI direction from the memory (101) to a PI arithmetic operation circuit (110), a PI code is added to the data, and the data are sequentially output to a modulation circuit (200). Thus, it is possible to omit memory access when the data is read from the memory (101) to the modulation circuit (200) and memory access when the error correction code is written in the memory by the PI arithmetic operation circuit.

Abstract: To provide a data encoding circuit capable of securing real-timeness of a recording operation even in a memory of a low operation clock frequency by reducing the number of times of accessing the memory, and simultaneously reducing power consumption and memory costs. Prior to its writing in a memory (101), data from a host is input to an EDC arithmetic operation circuit (110) and a scrambling arithmetic operation circuit (111) to be processed, and then the error correction codes are added to the data written in the memory (101) from the scrambling arithmetic operation circuit (111) by a PI arithmetic operation circuit (104) and a PO arithmetic operation circuit (105). Accordingly, it is possible to omit memory access when the data is written from the host in the memory, and memory access when the data is read from the memory to the EDC arithmetic operation circuit. Thus, it is possible to reduce an operation clock frequency of the memory (101).

Abstract: To provide a data encoding circuit capable of securing real-timeness of a recording operation even in a memory of a low operation clock frequency by reducing the number of times of accessing the memory, and simultaneously reducing power consumption and memory costs. Prior to its writing in a memory (101), data from a host is processed by an EDC arithmetic operation circuit (110) and a scrambling arithmetic operation circuit (111), and written in the memory (101). Next, error correction encoding of a PO direction is executed at a PO arithmetic operation circuit (105), and an obtained PO code is added to corresponding data to be written in the memory (101). Subsequently, the data are read in a PI direction line by line from the memory (101) to a PI arithmetic operation circuit (112). A PI code is added to the data, and the data are sequentially output to a modulation circuit (200).

Abstract: An error correction circuit capable of detecting burst errors included in a data signal with reliability. The error correction circuit comprises a reading unit, a first estimation unit, a second estimation unit, and a correction unit. The reading unit reads the data signal. The first estimation unit estimates error locations based on BIS code included in the data signal, and stores the locations into an error location storing unit. The second estimation unit estimates error locations based on characteristics of bit strings adjoining the BIS code, and stores the locations into the error location storing unit. The correction unit identifies erasure locations based on the error locations stored in the error location storing unit, and performs erasure correction on the erasure locations identified. Since the error locations are estimated based on the BIS code and the characteristics of the bit strings adjoining the BIS code as well, it is possible to detect burst errors without fail.

Abstract: A method according to the present invention generates weight data for each audio band and assigns a number of bits to each band according to the weight data. The method then calculates a total of the numbers of bits of one block and compares the total with an upper limit and with a lower limit of a compression target value. Based on the comparison result, the method increases or decreases the value of the weight data to update it. The method reassigns a number of bits based on the updated weight data.

Abstract: User data transmitted from the host side is first stored in write cache regions of an SDRAM 12 on the basis of an error correction process. When executing an ECC•EDC encode process of adding redundancy data such as an error correction code to the stored user data on the basis of the error correction processing, an encode region of SDRAM 12 is used. The data subjected to the ECC•EDC encode process is sequentially read out from encode region to be modulated and then written onto a disk.

Abstract: User data transmitted from the host side is first stored in write cache regions of an SDRAM 12 on the basis of an error correction process. When executing an ECC.EDC encode process of adding redundancy data such as an error correction code to the stored user data on the basis of the error correction processing, an encode region of SDRAM 12 is used. The data subjected to the ECC.EDC encode process is sequentially read out from encode region to be modulated and then written onto a disk.

Abstract: A synchronous circuit which detects a detection synchronizing signal generated from a reproduction signal in a detecting window having a prescribed time width, and in a detecting window having a prescribed time width, and generates a frame synchronizing signal. The synchronous circuit includes a counter for counting how many times detection synchronizing signals are not consecutively detected, and a detecting window width determining unit for increasing the time width of the detecting window if, as a result of comparison between a value counted by the counter and a prescribed value set in advance, the counted value reaches the prescribed value.

Abstract: An audio data dubbing system includes a reproduction side device and a recording side device. The reproduction side device reproduces intermittently from a reproduction side disc compressed audio data on the basis of a predetermined reproducing unit, which is first stored in a reproduction side memory and read out continuously therefrom to be provided as compressed audio data for recording. Recording side device first stores in a recording side memory compressed audio data for recording provided from the reproduction side device and reads out the same therefrom intermittently in a predetermined recording unit to be recorded on a recording side disc. The recording side device suspends the reproduction operation of compressed audio data from the reproduction side disc in the reproduction side device when the data amount in the recording side memory is increased to exceed a first reference value.

Abstract: A disc recorder containing a compressed data memory for storing compressed audio data to be recorded to a disc or reproduced from a disc. When a reduction pause state is set during reproduction operation, reading out of data from a compressed data memory is limited. Therefore, discontinuity of reproduced audio at the time of pause cancellation is prevented. When a recording pause state is set during recording operation, the compressed data memory is made empty. Therefore, discontinuity of the recording audio is also prevented at the time of pause cancellation.