Abstract: The invention relates to methods for synchronizing a device to a signal containing a train of pulses representing a programmable number of repetitions of a predetermined code. Pulse position and code phase are searched for. In a first aspect, a programmable number of samples is taken per pulse frame in function of the available number of repetitions of said predetermined code. In a second aspect, the method comprises a signal detection stage from which, after performing a confirmation stage, information can be kept for a subsequent stage. In a third aspect, only a limited number of rotated versions of the predetermined code are checked, using a presumed code phase which is kept from a preceding stage.

Abstract: A signal processing device is adapted for simultaneous processing of at least two process threads in a multi-processing manner. The device comprises a plurality of functional units capable of executing word- or subword-level operations on data. The device further comprises means for interconnecting the plurality of functional units, the means for interconnecting supporting a plurality of dynamically switchable interconnect arrangements, and at least one of the interconnect arrangements interconnects the plurality of functional units into at least two non-overlapping processing units each with a pre-determined topology. The device further comprises at least two control modules each assigned to one of the processing units.

Abstract: The invention relates to methods for synchronising a device to a signal containing a train of pulses representing a programmable number of repetitions of a predetermined code. Pulse position and code phase are searched for. In a first aspect, a programmable number of samples is taken per pulse frame in function of the available number of repetitions of said predetermined code. In a second aspect, the method comprises a signal detection stage from which, after performing a confirmation stage, information can be kept for a subsequent stage. In a third aspect, only a limited number of rotated versions of the predetermined code are checked, using a presumed code phase which is kept from a preceding stage.

Abstract: A signal processing device adapted for simultaneous processing of at least two process threads in a multi-processing manner is disclosed. In one embodiment, the device comprises a plurality of functional units capable of executing word- or subword-level operations on data. The device further comprises means for interconnecting the plurality of functional units, the means for interconnecting supporting a plurality of dynamically switchable interconnect arrangements, and at least one of the interconnect arrangements interconnects the plurality of functional units into at least two non-overlapping processing units each with a pre-determined topology. The device further comprises at least two control modules each assigned to one of the processing units.

Abstract: For the determination of motion vectors, an aliasing-reducing interpolation filtration with a sub-pel precision is used in the motion-compensated prediction of moving image sequences. More adjacent pixels are accessed in this interpolation filtration than in known bilinear interpolation. Asymmetrical filtration or reflection of pixels inside a reference image block is used to assure that maximally, a block of the reference image containing (M+1)×(M+1) pixels for interpolation filtration is accessed. However this process requires less memory bandwidth in accessing reference images.