Abstract: The central unit of a computer equipment has a processor and a memory as well as redundant units as backup units for the processor and/or the memory. Further, there are members for changeover from an active unit to a corresponding backup unit in the event of a fault in the active unit. The central unit has interrupt routines and carries out write and read operations against the peripheral units of the equipment. A bumpless changeover from an active unit to a backup unit is obtained by establishing rollback points (P.sub.0 -P.sub.4) in the program execution by storing the processor state and the memory content in at least all hardware initiated interrupt routines; by logging all operations against the peripheral units after each rollback point; by returning the program execution, after a changeover (at P.sub.f) to a backup unit, to the last established rollback point (P.sub.